Review Board 2.0.15


arm: Add support for ARMv8 (AArch64 & AArch32)

Review Request #2141 - Created Jan. 8, 2014 and submitted

Information
Ali Saidi
gem5
default
Reviewers
Default
Changeset 10032:5ac3782d2665
---------------------------
arm: Add support for ARMv8 (AArch64 & AArch32)

Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64
kernel you are restricted to AArch64 user-mode binaries. This will be addressed
in a later patch.

Note: Virtualization is only supported in AArch32 mode. This will also be fixed
in a later patch.
Existing regression tests run correctly with expected changes. 

AArch64 SE binaries run on SimpleAtomic, SimpleTiming, and O3 CPU models
AArch64 Linux boots on SimpleAtomic, SimpleTiming and O3 models with 1-4 cores

Issue Summary

2 1 1 0
Description From Last Updated Status
Yes, you're right. I've updated the my copy of the patch but haven't updated it Ali Saidi Jan. 22, 2014, 11:29 a.m. Open
Review request changed
Updated (April 9, 2014, 1:47 p.m.)

Status: Closed (submitted)

Posted (June 30, 2014, 1:34 p.m.)
After applying this patch, the minimum number of float regs should be 160, even for ARMv7 ISA. If you set the number of numPhysFloatRegs to lower than 160, you get an assertion error from cpu/o3/cpu.cc:
assert(params->numPhysFloatRegs >= numThreads * TheISA::NumFloatRegs);

The reason is that this patch sets the number of NumFloatRegs based on v8 and does not differentiate between v7 and v8 ISAs. See src/arch/arm/registers.hh:
-const int NumFloatArchRegs = 64;
-const int NumFloatSpecialRegs = 8;
+const int NumFloatV7ArchRegs  = 64;
+const int NumFloatV8ArchRegs  = 128;
+const int NumFloatSpecialRegs = 32;
  
-const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
+const int NumFloatRegs = NumFloatV8ArchRegs + NumFloatSpecialRegs;

I think this patch should not change the required number of float regs for ARMv7. Am I missing something?
  1. Unfortunately, we need to have a big enough register file for all the FP registers and it's not really possible to differentiate. Long term gem5 will support ARMv8 (32 and 64 bit) only and be backwards compatible for running 32-bit code (pretty much the state it's in now), but it's pretty impossible to properly support to architecture versions simultaneously.