Review Board 2.0.15


cpu: o3: single cycle default div microop latency on x86

Review Request #2744 - Created April 20, 2015 and submitted

Information
Nilay Vaish
gem5
default
Reviewers
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Changeset 10790:978c397951b2
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cpu: o3: single cycle default div microop latency on x86

This patch sets the default latency of the division microop to a single cycle
on x86.  This is because the division instructions DIV and IDIV have been
implemented as loops of div microops, where each microop computes a single bit
of the quotient.

   
Review request changed
Updated (April 29, 2015, 8:40 p.m.)

Status: Closed (submitted)