cpu: o3: single cycle default div microop latency on x86
Review Request #2744 - Created April 20, 2015 and submitted
| Information | |
|---|---|
| Nilay Vaish | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 10790:978c397951b2 --------------------------- cpu: o3: single cycle default div microop latency on x86 This patch sets the default latency of the division microop to a single cycle on x86. This is because the division instructions DIV and IDIV have been implemented as loops of div microops, where each microop computes a single bit of the quotient.