Changeset 10841:b015addd7b9d

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mem: Ruby response timing
This patch ensures that Ruby responses to the CPU core are not unnecessarily

delayed. The original code delays Ruby responses by a tick, causing the core

to receive them a cycle later, rather than in the same cycle. Hence, the

throughput of back-to-back stores that hit in the L1 are reduced by

half because the O3 must wait for the acknowledgement of a prior store before

issuing the next store.  This patch eliminates the performance bug.
This patch was created by Bihn Pham during his internship at AMD.