mem: Align cache behaviour in atomic when upstream is responding
Review Request #3270 - Created Jan. 1, 2016 and submitted
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Andreas Hansson | |
gem5 | |
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Reviewers | |
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Changeset 11295:ffdf6dd3f3ec --------------------------- mem: Align cache behaviour in atomic when upstream is responding Adopt the same flow as in timing mode, where the caches on the path to memory get to keep the line (if present), and we use the responderHadWritable flag to determine if we need to forward the (invalidating) packet or not.
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