Review Board 2.0.15


mem: Align cache behaviour in atomic when upstream is responding

Review Request #3270 - Created Jan. 1, 2016 and submitted

Information
Andreas Hansson
gem5
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Reviewers
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Changeset 11295:ffdf6dd3f3ec
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mem: Align cache behaviour in atomic when upstream is responding

Adopt the same flow as in timing mode, where the caches on the path to
memory get to keep the line (if present), and we use the
responderHadWritable flag to determine if we need to forward the
(invalidating) packet or not.

   
Review request changed
Updated (Feb. 10, 2016, 12:40 a.m.)

Status: Closed (submitted)