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commit 70469eba20cdcf091d66cf2ef463318203c7cc71

Review Request #3816 - Created Feb. 21, 2017 and updated

Information
Rahul Thakur
gem5
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Reviewers
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Changeset 11873:f1d504c8ede4
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commit 70469eba20cdcf091d66cf2ef463318203c7cc71
Author: Slava Malyugin <slavamn@google.com>
Date:   Wed Dec 2 19:01:12 2015 -0800

    arm, kvm: fix saving/restoring conditional flags in ARM KVM64

    The gem5 stores flags separately from other fields CPSR, so we need to
    split them out and recombine on trips to/from KVM.

    Change-Id: I9f0a685f8667c581cdef7d8c234604a3135d9402

   

Issue Summary

2 2 0 0
Review request changed
Updated (Feb. 23, 2017, 11:17 a.m.)

Description:

~  

Changeset 11873:6069fbdacba5

  ~

Changeset 11873:f1d504c8ede4

   
   

commit 70469eba20cdcf091d66cf2ef463318203c7cc71

    Author: Slava Malyugin slavamn@google.com
    Date: Wed Dec 2 19:01:12 2015 -0800

   
   
arm, kvm: fix saving/restoring conditional flags in ARM KVM64
   
   
The gem5 stores flags separately from other fields CPSR, so we need to
   
split them out and recombine on trips to/from KVM.
   
   
Change-Id: I9f0a685f8667c581cdef7d8c234604a3135d9402
   

Diff:

Revision 2 (+29 -3)

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Fix it, then Ship it!
Posted (Feb. 24, 2017, 5:40 a.m.)



  
src/arch/arm/kvm/armv8_cpu.cc (Diff revision 2)
 
 

I don't think you need this. You should be able to just load the value straight from kvm into a CPSR-typed variable. E.g.:

const CPSR cpsr(getOneRegU64(...));
tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr);
// set CC regs
...

Looks good, thanks for refactoring!