arm, kvm: enable running 32-bit Guest under ARM KVM64
Review Request #3817 - Created Feb. 21, 2017 and updated
| Information | |
|---|---|
| Rahul Thakur | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 11874:85949465c50b --------------------------- arm, kvm: enable running 32-bit Guest under ARM KVM64 1) Pass KVM_ARM_VCPU_EL1_32BIT to kvmArmVCpuInit when running 32-bit OS 2) Correctly map 64-bit registers to banked 32-bit ones Change-Id: I20d138276f6cc5aff7a855988c2e30dccef5affc
Issue Summary
| Description | From | Last Updated | Status |
|---|---|---|---|
| This change shouldn't be needed anymore. The ISA code automatically maps SPSR_EL1 to the same physical register as SPSR_SVC. (See ... | Andreas Sandberg | Feb. 22, 2017, 6:52 a.m. | Open |
| Shouldn't be needed anymore. See comment above. | Andreas Sandberg | Feb. 22, 2017, 6:52 a.m. | Open |
| I'd suggest adding something like this instead: const bool in_a64 = inAArch64(tc); That'd remove the need to read out cpsr ... | Andreas Sandberg | Feb. 22, 2017, 6:52 a.m. | Open |
| I don't think this is actually needed. gem5 typically intercepts accesses to INTREG_PC and redirects them to the pcState using ... | Andreas Sandberg | Feb. 22, 2017, 6:52 a.m. | Open |
| What's the reason for setting the PSCI flag? | Andreas Sandberg | Feb. 22, 2017, 6:52 a.m. | Open |
Thanks for fixing this!
I think we may have independently fixed the SPSR mapping issue by adding mapping in the ISA code. Other than that, there are some minor structural things below.
-
src/arch/arm/kvm/armv8_cpu.cc (Diff revision 1) -
This change shouldn't be needed anymore. The ISA code automatically maps SPSR_EL1 to the same physical register as SPSR_SVC. (See the MiscRegSwitch table in arch/arm/isa.cc)
-
src/arch/arm/kvm/armv8_cpu.cc (Diff revision 1) -
Shouldn't be needed anymore. See comment above.
-
src/arch/arm/kvm/armv8_cpu.cc (Diff revision 1) -
I'd suggest adding something like this instead:
const bool in_a64 = inAArch64(tc);
That'd remove the need to read out cpsr before the loop above and the special case for CPSR.
-
src/arch/arm/kvm/armv8_cpu.cc (Diff revision 1) -
I don't think this is actually needed. gem5 typically intercepts accesses to INTREG_PC and redirects them to the pcState using a readPC() helper method on the exec context.
-
src/arch/arm/kvm/base_cpu.cc (Diff revision 1) -
What's the reason for setting the PSCI flag?
Summary: |
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Description: |
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Diff: |
Revision 2 (+10 -1) |