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[Submitted] arch, cpu: Do not forward snoops to table walker
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ahansson
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March 30th, 2015, 9:17 a.m.
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[Submitted] mem: Pass shared downstream through caches
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ahansson
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March 30th, 2015, 9:17 a.m.
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[Submitted] mem: Add forward snoop check for HardPFReqs
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ahansson
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March 30th, 2015, 9:16 a.m.
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[Submitted] mem: Add missing stats update for uncacheable MSHRs
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ahansson
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March 30th, 2015, 9:16 a.m.
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[Submitted] mem: Tidy up BaseCache parameters
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ahansson
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March 30th, 2015, 9:16 a.m.
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[Submitted] arm: Relax ordering for some uncacheable accesses
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ahansson
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March 30th, 2015, 9:17 a.m.
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[Submitted] cpu: Work around gcc 4.9 issues with Num_OpClasses
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ahansson
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April 30th, 2015, 12:45 p.m.
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[Submitted] arm, dev: Add a UFS device
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ahansson
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March 27th, 2015, 1:57 p.m.
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[Submitted] arm, dev: Add a NAND flash timing model
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ahansson
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March 27th, 2015, 1:56 p.m.
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[Submitted] dev: Add support for i2c devices
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ahansson
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March 18th, 2015, 4:41 p.m.
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[Submitted] cpu: Remove the InOrderCPU from the tree
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ahansson
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March 24th, 2015, 3:50 p.m.
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[Submitted] config: Remove memory aliases and rely on class name
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ahansson
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April 2nd, 2015, 9:31 a.m.
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[Submitted] mem: Allocate cache writebacks before new MSHRs
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ahansson
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March 22nd, 2015, 7:35 a.m.
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[Submitted] mem: Cleanup flow for uncacheable accesses
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ahansson
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March 17th, 2015, 7:10 p.m.
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[Submitted] mem: Ignore uncacheable MSHRs when finding matches
|
ahansson
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March 17th, 2015, 7:10 p.m.
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[Submitted] mem: Support any number of master-IDs in stride prefetcher
|
ahansson
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March 17th, 2015, 7:09 p.m.
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[Submitted] mem: Remove redundant allocateUncachedReadBuffer in cache
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ahansson
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March 17th, 2015, 7:09 p.m.
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[Submitted] mem: Modernise MSHR iterators to C++11
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ahansson
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March 17th, 2015, 7:09 p.m.
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[Submitted] mem: Align all MSHR entries to block boundaries
|
ahansson
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March 17th, 2015, 7:09 p.m.
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[Submitted] mem: Rename PREFETCH_SNOOP_SQUASH flag to BLOCK_CACHED
|
ahansson
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March 17th, 2015, 7:08 p.m.
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[Submitted] test, arm: Add scripts to test checkpoints
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ahansson
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March 6th, 2015, 1:40 p.m.
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[Submitted] tests: Recategorise regressions based on run time
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ahansson
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March 6th, 2015, 1:40 p.m.
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[Submitted] config: Specify OS type and release on command line
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ahansson
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February 23rd, 2015, 2:15 p.m.
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[Submitted] arm: Add a GICv2m device
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ahansson
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March 6th, 2015, 1:39 p.m.
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[Submitted] config: Add soak test for memtest.py
|
ahansson
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March 6th, 2015, 1:39 p.m.
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[Submitted] arm: Remove the 'magic MSI register' in the GIC (PL390)
|
ahansson
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March 6th, 2015, 1:39 p.m.
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[Submitted] mem: Add byte mask to Packet::checkFunctional
|
ahansson
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February 19th, 2015, 7:56 a.m.
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[Submitted] mem: Fix cache MSHR conflict determination
|
ahansson
|
February 23rd, 2015, 1:05 p.m.
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[Submitted] mem: Add crossbar latencies
|
ahansson
|
February 19th, 2015, 7:55 a.m.
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[Submitted] mem: Add option to force in-order insertion in PacketQueue
|
ahansson
|
February 19th, 2015, 7:56 a.m.
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[Submitted] mem: Downstream components consumes new crossbar delays
|
ahansson
|
February 19th, 2015, 7:55 a.m.
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[Submitted] mem: Move crossbar default latencies to subclasses
|
ahansson
|
February 19th, 2015, 7:55 a.m.
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[Submitted] dev, arm: Clean up PL011 and rewrite interrupt handling
|
ahansson
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February 19th, 2015, 7:55 a.m.
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[Submitted] arm: Share a port for the two table walker objects
|
ahansson
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February 19th, 2015, 7:55 a.m.
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[Submitted] cpu: Add a PC-value to the traffic generator requests
|
ahansson
|
February 19th, 2015, 7:55 a.m.
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[Submitted] tests: Run regression timeout as foreground
|
ahansson
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February 19th, 2015, 7:55 a.m.
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[Submitted] mem: Fix prefetchSquash + memInhibitAsserted bug
|
ahansson
|
February 13th, 2015, 8:36 a.m.
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[Submitted] cpu: o3 register renaming request handling improved
|
ahansson
|
February 7th, 2015, 5:24 p.m.
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[Submitted] mem: Split port retry for all different packet classes
|
ahansson
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February 7th, 2015, 5:24 p.m.
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[Submitted] config: Add memcheck stress test
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] mem: Fix initial value problem with MemChecker
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] dev: Fix undefined behaviuor in i8254xGBe
|
ahansson
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February 9th, 2015, 2:24 p.m.
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[Submitted] arm: Wire up the GIC with the platform in the base class
|
ahansson
|
February 5th, 2015, 10:59 a.m.
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[Submitted] mem: mmap the backing store with MAP_NORESERVE
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] mem: Use the range cache for lookup as well as access
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] arch: Make readMiscRegNoEffect const throughout
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] config: add --root-device machine parameter
|
ahansson
|
January 28th, 2015, 10:06 a.m.
|
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[Submitted] arm: Merge ISA files with pseudo instructions
|
ahansson
|
December 12th, 2014, 5:45 p.m.
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[Submitted] mem: Clarification of packet crossbar timings
|
ahansson
|
February 5th, 2015, 12:52 p.m.
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[Submitted] config: Revamp memtest to allow testers on any level
|
ahansson
|
January 21st, 2015, 1:24 p.m.
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