Review Board 2.0.15


  • Timothy Jones

    tmjones

    Timothy Jones
    Last logged in July 1, 2015
    Joined June 7, 2010
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tmjones's review requests

Summary Submitter Posted Last Updated
ruby: Fix memWriteback() not to record auto-delete events
tmjones
July 8th, 2015, 8:32 p.m.
ruby: Fix checkpointing and restore
tmjones
June 23rd, 2015, 1:17 p.m.
[Discarded] Sim: When one CPU is taking over from another, the new CPU's memory is only
tmjones
July 9th, 2010, 6:11 p.m.
[Discarded] SimpleCPU: Allow Simple CPUs to warm a branch predictor by creating a pointer
tmjones
July 9th, 2010, 6:10 p.m.
BranchPred: Take the branch predictor out of O3CPU and make it a stand-alone
tmjones
July 9th, 2010, 6:06 p.m.
O3CPU: Fix iqCount and lsqCount SMT fetch policies.
tmjones
July 29th, 2010, 9:27 a.m.
Sim: Add functionality to the simulation scripts to allow running with
tmjones
July 9th, 2010, 6:21 p.m.
Port: Only indicate that a SimpleTimingPort is drained if its send event is
tmjones
July 9th, 2010, 6:20 p.m.
O3CPU: O3's tick event gets squashed when it is switched out. When repeatedly
tmjones
July 9th, 2010, 6:12 p.m.
LSQ Unit: After deleting part of a split request, set it to NULL so that it
tmjones
July 16th, 2010, 6:32 p.m.
Power: The condition register should be set or cleared upon a system call
tmjones
July 21st, 2010, 12:25 p.m.
Power: Provide a utility function to copy registers from one thread context
tmjones
July 9th, 2010, 5:52 p.m.
Syscall: Don't close the simulator's standard file descriptors.
tmjones
July 9th, 2010, 6:14 p.m.
O3CPU: Fix a bug where stores in the cpu where never marked as split.
tmjones
July 9th, 2010, 6:19 p.m.
CPU: Add functions to get the number of executed instructions and set the
tmjones
July 9th, 2010, 6:13 p.m.
Cache: Provide a function to mark caches as ready from python.
tmjones
July 9th, 2010, 6:15 p.m.
Stats: Allow backing up and restoring of stats which is needed for SMARTS
tmjones
July 9th, 2010, 6:21 p.m.