diff -r 9b6a5b67cac8 -r f7bdab0ff07d src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh	Fri Feb 03 09:13:51 2012 -0600
+++ b/src/cpu/o3/fetch_impl.hh	Fri Feb 03 09:13:53 2012 -0600
@@ -544,7 +544,7 @@
         DPRINTF(Fetch, "[tid:%i] Can't fetch cache line, switched out\n",
                 tid);
         return false;
-    } else if (checkInterrupt(pc)) {
+    } else if (checkInterrupt(pc) && !delayedCommit[tid]) {
         // Hold off fetch from getting new instructions when:
         // Cache is blocked, or
         // while an interrupt is pending and we're not in PAL mode, or
@@ -721,6 +721,13 @@
 
     fetchStatus[tid] = Squashing;
 
+    // microops are being squashed, it is not known wheather the
+    // youngest non-squashed microop was  marked delayed commit
+    // or not. Setting the flag to true ensures that the
+    // interrupts are not handled when they cannot be, though
+    // some opportunities to handle interrupts may be missed.
+    delayedCommit[tid] = true;
+
     ++fetchSquashCycles;
 }