diff -r 7cbe0e2f6b86 -r 286030fb113a configs/common/CacheConfig.py
--- a/configs/common/CacheConfig.py	Mon Feb 13 06:46:43 2012 -0500
+++ b/configs/common/CacheConfig.py	Mon Feb 13 11:55:51 2012 +0000
@@ -46,7 +46,6 @@
         system.tol2bus = Bus()
         system.l2.cpu_side = system.tol2bus.master
         system.l2.mem_side = system.membus.slave
-        system.l2.num_cpus = options.num_cpus
 
     for i in xrange(options.num_cpus):
         if options.caches:
diff -r 7cbe0e2f6b86 -r 286030fb113a tests/configs/realview-simple-atomic-dual.py
--- a/tests/configs/realview-simple-atomic-dual.py	Mon Feb 13 06:46:43 2012 -0500
+++ b/tests/configs/realview-simple-atomic-dual.py	Mon Feb 13 11:55:51 2012 +0000
@@ -83,7 +83,6 @@
 system.l2c = L2(size='4MB', assoc=8)
 system.l2c.cpu_side = system.toL2Bus.master
 system.l2c.mem_side = system.membus.slave
-system.l2c.num_cpus = 2
 
 #connect up the cpu and l1s
 for c in cpus: