diff -r b5d80698c948 -r 249de1a823e6 configs/example/fs.py --- a/configs/example/fs.py Tue Mar 06 11:14:54 2012 -0500 +++ b/configs/example/fs.py Tue Mar 06 19:55:45 2012 -0500 @@ -159,7 +159,7 @@ else: mem_size = SysConfig().mem() if options.caches or options.l2cache: - test_sys.iocache = IOCache(addr_range=test_sys.physmem.range) + test_sys.iocache = IOCache(addr_ranges=[mem_size]) test_sys.iocache.cpu_side = test_sys.iobus.master test_sys.iocache.mem_side = test_sys.membus.slave else: diff -r b5d80698c948 -r 249de1a823e6 src/mem/cache/BaseCache.py --- a/src/mem/cache/BaseCache.py Tue Mar 06 11:14:54 2012 -0500 +++ b/src/mem/cache/BaseCache.py Tue Mar 06 19:55:45 2012 -0500 @@ -60,5 +60,5 @@ prefetcher = Param.BasePrefetcher(NULL,"Prefetcher attached to cache") cpu_side = SlavePort("Port on side closer to CPU") mem_side = MasterPort("Port on side closer to MEM") - addr_range = Param.AddrRange(AllMemory, "The address range for the CPU-side port") + addr_ranges = VectorParam.AddrRange([AllMemory], "The address range for the CPU-side port") system = Param.System(Parent.any, "System we belong to") diff -r b5d80698c948 -r 249de1a823e6 src/mem/cache/base.hh --- a/src/mem/cache/base.hh Tue Mar 06 11:14:54 2012 -0500 +++ b/src/mem/cache/base.hh Tue Mar 06 19:55:45 2012 -0500 @@ -269,7 +269,7 @@ /** * The address range to which the cache responds on the CPU side. * Normally this is all possible memory addresses. */ - Range addrRange; + AddrRangeList addrRanges; public: /** System we are currently operating in. */ @@ -439,7 +439,7 @@ Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); } - const Range &getAddrRange() const { return addrRange; } + const AddrRangeList &getAddrRanges() const { return addrRanges; } MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool requestBus) { diff -r b5d80698c948 -r 249de1a823e6 src/mem/cache/base.cc --- a/src/mem/cache/base.cc Tue Mar 06 11:14:54 2012 -0500 +++ b/src/mem/cache/base.cc Tue Mar 06 19:55:45 2012 -0500 @@ -83,7 +83,7 @@ noTargetMSHR(NULL), missCount(p->max_miss_count), drainEvent(NULL), - addrRange(p->addr_range), + addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), system(p->system) { } diff -r b5d80698c948 -r 249de1a823e6 src/mem/cache/cache_impl.hh --- a/src/mem/cache/cache_impl.hh Tue Mar 06 11:14:54 2012 -0500 +++ b/src/mem/cache/cache_impl.hh Tue Mar 06 19:55:45 2012 -0500 @@ -1556,9 +1556,7 @@ AddrRangeList Cache::CpuSidePort::getAddrRanges() { - AddrRangeList ranges; - ranges.push_back(cache->getAddrRange()); - return ranges; + return cache->getAddrRanges(); } template diff -r b5d80698c948 -r 249de1a823e6 tests/configs/pc-o3-timing.py --- a/tests/configs/pc-o3-timing.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/pc-o3-timing.py Tue Mar 06 19:55:45 2012 -0500 @@ -77,7 +77,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range = AddrRange(0, size=mem_size) + addr_ranges = [AddrRange(0, size=mem_size)] forward_snoops = False #cpu @@ -86,7 +86,7 @@ mdesc = SysConfig(disk = 'linux-x86.img') system = FSConfig.makeLinuxX86System('timing', mdesc=mdesc) system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9') -system.iocache = IOCache(addr_range=mem_size) +system.iocache = IOCache() system.iocache.cpu_side = system.iobus.master system.iocache.mem_side = system.membus.slave diff -r b5d80698c948 -r 249de1a823e6 tests/configs/pc-simple-atomic.py --- a/tests/configs/pc-simple-atomic.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/pc-simple-atomic.py Tue Mar 06 19:55:45 2012 -0500 @@ -78,7 +78,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range = AddrRange(0, size=mem_size) + addr_ranges = [AddrRange(0, size=mem_size)] forward_snoops = False is_top_level = True @@ -88,7 +88,7 @@ mdesc = SysConfig(disk = 'linux-x86.img') system = FSConfig.makeLinuxX86System('atomic', mdesc=mdesc) system.kernel = FSConfig.binary('x86_64-vmlinux-2.6.22.9') -system.iocache = IOCache(addr_range=mem_size) +system.iocache = IOCache() system.iocache.cpu_side = system.iobus.master system.iocache.mem_side = system.membus.slave diff -r b5d80698c948 -r 249de1a823e6 tests/configs/pc-simple-timing.py --- a/tests/configs/pc-simple-timing.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/pc-simple-timing.py Tue Mar 06 19:55:45 2012 -0500 @@ -78,7 +78,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range = AddrRange(0, size=mem_size) + addr_ranges = [AddrRange(0, size=mem_size)] forward_snoops = False #cpu @@ -91,7 +91,7 @@ system.cpu = cpu #create the l1/l2 bus system.toL2Bus = Bus() -system.iocache = IOCache(addr_range=mem_size) +system.iocache = IOCache() system.iocache.cpu_side = system.iobus.master system.iocache.mem_side = system.membus.slave diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-o3-dual.py --- a/tests/configs/realview-o3-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-o3-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-o3.py --- a/tests/configs/realview-o3.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-o3.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-simple-atomic-dual.py --- a/tests/configs/realview-simple-atomic-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-simple-atomic-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-simple-atomic.py --- a/tests/configs/realview-simple-atomic.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-simple-atomic.py Tue Mar 06 19:55:45 2012 -0500 @@ -63,7 +63,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-simple-timing-dual.py --- a/tests/configs/realview-simple-timing-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-simple-timing-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/realview-simple-timing.py --- a/tests/configs/realview-simple-timing.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/realview-simple-timing.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='256MB') + addr_ranges = [AddrRange(0, size='256MB')] forward_snoops = False #cpu diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-inorder.py --- a/tests/configs/tsunami-inorder.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-inorder.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-o3-dual.py --- a/tests/configs/tsunami-o3-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-o3-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-o3.py --- a/tests/configs/tsunami-o3.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-o3.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-simple-atomic-dual.py --- a/tests/configs/tsunami-simple-atomic-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-simple-atomic-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -63,7 +63,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-simple-atomic.py --- a/tests/configs/tsunami-simple-atomic.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-simple-atomic.py Tue Mar 06 19:55:45 2012 -0500 @@ -63,7 +63,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-simple-timing-dual.py --- a/tests/configs/tsunami-simple-timing-dual.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-simple-timing-dual.py Tue Mar 06 19:55:45 2012 -0500 @@ -63,7 +63,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True diff -r b5d80698c948 -r 249de1a823e6 tests/configs/tsunami-simple-timing.py --- a/tests/configs/tsunami-simple-timing.py Tue Mar 06 11:14:54 2012 -0500 +++ b/tests/configs/tsunami-simple-timing.py Tue Mar 06 19:55:45 2012 -0500 @@ -64,7 +64,7 @@ mshrs = 20 size = '1kB' tgts_per_mshr = 12 - addr_range=AddrRange(0, size='8GB') + addr_ranges = [AddrRange(0, size='8GB')] forward_snoops = False is_top_level = True