diff -r 6df06e5975c6 -r 684084e958c8 src/arch/x86/isa/microops/ldstop.isa
--- a/src/arch/x86/isa/microops/ldstop.isa	Sun Mar 11 16:51:38 2012 -0500
+++ b/src/arch/x86/isa/microops/ldstop.isa	Fri Mar 16 03:06:33 2012 -0700
@@ -361,7 +361,7 @@
     exec_output = ""
 
     calculateEA = '''
-    EA = bits(SegBase + scale * Index + Base + disp, addressSize * 8 - 1, 0);
+    EA = SegBase + bits(scale * Index + Base + disp, addressSize * 8 - 1, 0);
     '''
 
     def defineMicroLoadOp(mnemonic, code, bigCode='',
diff -r 6df06e5975c6 -r 684084e958c8 src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc	Sun Mar 11 16:51:38 2012 -0500
+++ b/src/arch/x86/tlb.cc	Fri Mar 16 03:06:33 2012 -0700
@@ -281,6 +281,9 @@
                     return new GeneralProtection(0);
             }
         }
+        if (m5Reg.mode != LongMode ||
+                (flags & (AddrSizeFlagBit << FlagShift)))
+            vaddr &= mask(32);
         // If paging is enabled, do the translation.
         if (m5Reg.paging) {
             DPRINTF(TLB, "Paging enabled.\n");