diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/thread_state.cc --- a/src/cpu/thread_state.cc Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/thread_state.cc Tue Mar 27 11:57:22 2012 +0100 @@ -101,17 +101,25 @@ void ThreadState::initMemProxies(ThreadContext *tc) { - // Note that this only refers to the port on the CPU side and can - // safely be done at init() time even if the CPU is not connected - // (i.e. due to restoring from a checkpoint and later switching - // in. - if (physProxy == NULL) - // this cannot be done in the constructor as the thread state + // The port proxies only refer to the data port on the CPU side + // and can safely be done at init() time even if the CPU is not + // connected, i.e. when restoring from a checkpoint and later + // switching the CPU in. + if (FullSystem) { + assert(physProxy == NULL); + // This cannot be done in the constructor as the thread state // itself is created in the base cpu constructor and the - // getPort is a virtual function at the moment + // getDataPort is a virtual function physProxy = new PortProxy(baseCpu->getDataPort()); - if (virtProxy == NULL) + + assert(virtProxy == NULL); virtProxy = new FSTranslatingPortProxy(tc); + } else { + assert(proxy == NULL); + proxy = new SETranslatingPortProxy(baseCpu->getDataPort(), + process, + SETranslatingPortProxy::NextPage); + } } void @@ -127,13 +135,3 @@ if (profile) profile->sample(profileNode, profilePC); } - -SETranslatingPortProxy & -ThreadState::getMemProxy() -{ - if (proxy == NULL) - proxy = new SETranslatingPortProxy(baseCpu->getDataPort(), - process, - SETranslatingPortProxy::NextPage); - return *proxy; -} diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/thread_state.hh --- a/src/cpu/thread_state.hh Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/thread_state.hh Tue Mar 27 11:57:22 2012 +0100 @@ -85,7 +85,7 @@ * Initialise the physical and virtual port proxies and tie them to * the data port of the CPU. * - * tc ThreadContext for the virtual-to-physical translation + * @param tc ThreadContext for the virtual-to-physical translation */ void initMemProxies(ThreadContext *tc); @@ -105,7 +105,7 @@ Process *getProcessPtr() { return process; } - SETranslatingPortProxy &getMemProxy(); + SETranslatingPortProxy &getMemProxy() { return *proxy; } /** Reads the number of instructions functionally executed and * committed. diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/simple/timing.cc --- a/src/cpu/simple/timing.cc Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/simple/timing.cc Tue Mar 27 11:57:22 2012 +0100 @@ -64,6 +64,10 @@ TimingSimpleCPU::init() { BaseCPU::init(); + + // Initialise the ThreadContext's memory proxies + tcBase()->initMemProxies(tcBase()); + if (FullSystem) { for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; @@ -71,9 +75,6 @@ TheISA::initCPU(tc, _cpuId); } } - - // Initialise the ThreadContext's memory proxies - tcBase()->initMemProxies(tcBase()); } void diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/simple/atomic.cc --- a/src/cpu/simple/atomic.cc Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/simple/atomic.cc Tue Mar 27 11:57:22 2012 +0100 @@ -80,6 +80,10 @@ AtomicSimpleCPU::init() { BaseCPU::init(); + + // Initialise the ThreadContext's memory proxies + tcBase()->initMemProxies(tcBase()); + if (FullSystem) { ThreadID size = threadContexts.size(); for (ThreadID i = 0; i < size; ++i) { @@ -89,9 +93,6 @@ } } - // Initialise the ThreadContext's memory proxies - tcBase()->initMemProxies(tcBase()); - if (hasPhysMemPort) { AddrRangeList pmAddrList = physmemPort.getPeer()->getAddrRanges(); physMemAddr = *pmAddrList.begin(); diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/o3/cpu.cc --- a/src/cpu/o3/cpu.cc Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/o3/cpu.cc Tue Mar 27 11:57:22 2012 +0100 @@ -639,10 +639,13 @@ { BaseCPU::init(); - // Set inSyscall so that the CPU doesn't squash when initially - // setting up registers. - for (ThreadID tid = 0; tid < numThreads; ++tid) + for (ThreadID tid = 0; tid < numThreads; ++tid) { + // Set inSyscall so that the CPU doesn't squash when initially + // setting up registers. thread[tid]->inSyscall = true; + // Initialise the ThreadContext's memory proxies + thread[tid]->initMemProxies(thread[tid]->getTC()); + } // this CPU could still be unconnected if we are restoring from a // checkpoint and this CPU is to be switched in, thus we can only @@ -655,8 +658,6 @@ for (ThreadID tid = 0; tid < numThreads; tid++) { ThreadContext *src_tc = threadContexts[tid]; TheISA::initCPU(src_tc, src_tc->contextId()); - // Initialise the ThreadContext's memory proxies - thread[tid]->initMemProxies(thread[tid]->getTC()); } } diff -r 50d1b7dbd23c -r 23a5066ed0af src/cpu/inorder/cpu.cc --- a/src/cpu/inorder/cpu.cc Mon Mar 26 05:37:00 2012 -0400 +++ b/src/cpu/inorder/cpu.cc Tue Mar 27 11:57:22 2012 +0100 @@ -787,21 +787,20 @@ void InOrderCPU::init() { - if (!deferRegistration) { - registerThreadContexts(); + BaseCPU::init(); + + for (ThreadID tid = 0; tid < numThreads; ++tid) { + // Set inSyscall so that the CPU doesn't squash when initially + // setting up registers. + thread[tid]->inSyscall = true; + // Initialise the ThreadContext's memory proxies + thread[tid]->initMemProxies(thread[tid]->getTC()); } - // Set inSyscall so that the CPU doesn't squash when initially - // setting up registers. - for (ThreadID tid = 0; tid < numThreads; ++tid) - thread[tid]->inSyscall = true; - if (FullSystem) { for (ThreadID tid = 0; tid < numThreads; tid++) { ThreadContext *src_tc = threadContexts[tid]; TheISA::initCPU(src_tc, src_tc->contextId()); - // Initialise the ThreadContext's memory proxies - thread[tid]->initMemProxies(thread[tid]->getTC()); } }