diff -r 5534a564f6a0 -r 2dd7c024f1a1 src/mem/ruby/buffers/MessageBuffer.hh --- a/src/mem/ruby/buffers/MessageBuffer.hh Mon Apr 09 23:20:30 2012 -0700 +++ b/src/mem/ruby/buffers/MessageBuffer.hh Tue Apr 10 18:18:06 2012 +0100 @@ -162,7 +162,9 @@ Consumer* m_consumer_ptr; // Consumer to signal a wakeup(), can be NULL std::vector m_prio_heap; - typedef m5::hash_map< Address, std::list > StallMsgMapType; + // use a std::map for the stalled messages as this container is + // sorted and ensures a well-defined iteration order + typedef std::map< Address, std::list > StallMsgMapType; typedef std::vector::iterator MsgListIter; StallMsgMapType m_stall_msg_map; diff -r 5534a564f6a0 -r 2dd7c024f1a1 src/mem/ruby/system/TimerTable.hh --- a/src/mem/ruby/system/TimerTable.hh Mon Apr 09 23:20:30 2012 -0700 +++ b/src/mem/ruby/system/TimerTable.hh Tue Apr 10 18:18:06 2012 +0100 @@ -33,7 +33,6 @@ #include #include -#include "base/hashmap.hh" #include "mem/ruby/common/Address.hh" #include "mem/ruby/common/Global.hh" @@ -74,7 +73,10 @@ TimerTable& operator=(const TimerTable& obj); // Data Members (m_prefix) - typedef m5::hash_map AddressMap; + + // use a std::map for the address map as this container is sorted + // and ensures a well-defined iteration order + typedef std::map AddressMap; AddressMap m_map; mutable bool m_next_valid; mutable Time m_next_time; // Only valid if m_next_valid is true diff -r 5534a564f6a0 -r 2dd7c024f1a1 src/mem/slicc/symbols/StateMachine.py --- a/src/mem/slicc/symbols/StateMachine.py Mon Apr 09 23:20:30 2012 -0700 +++ b/src/mem/slicc/symbols/StateMachine.py Tue Apr 10 18:18:06 2012 +0100 @@ -324,7 +324,7 @@ bool m_is_blocking; std::map m_block_map; typedef std::vector MsgVecType; -typedef m5::hash_map< Address, MsgVecType* > WaitingBufType; +typedef std::map< Address, MsgVecType* > WaitingBufType; WaitingBufType m_waiting_buffers; int m_max_in_port_rank; int m_cur_in_port_rank;