diff -r def937c27f54 -r c8c03cb78aa1 src/arch/isa_parser.py
--- a/src/arch/isa_parser.py	Tue Apr 24 08:16:11 2012 -0500
+++ b/src/arch/isa_parser.py	Tue Apr 24 16:13:34 2012 -0500
@@ -415,7 +415,7 @@
                       "reg_idx": self.reg_spec,
                       "ctype": self.ctype}
         if hasattr(self, 'src_reg_idx'):
-            subst_dict['op_idx'] = self.src_reg_idx
+            subst_dict['op_idx'] = "_srcMapCompileToExec[%s]" % self.src_reg_idx
         code = self.read_code % subst_dict
         return '%s = %s;\n' % (self.base_name, code)
 
@@ -519,8 +519,10 @@
     def makeConstructor(self):
         c = ''
         if self.is_src:
-            c += '\n\t_srcRegIdx[%d] = %s;' % \
-                 (self.src_reg_idx, self.reg_spec)
+            c += '''
+                    _srcRegIdx[_numSrcRegs] = %s;
+                    _srcMapCompileToExec[%s] = _numSrcRegs++;
+            ''' % (self.reg_spec, self.src_reg_idx)
         if self.is_dest:
             c += '\n\t_destRegIdx[%d] = %s;' % \
                  (self.dest_reg_idx, self.reg_spec)
@@ -531,7 +533,8 @@
             error('Attempt to read integer register as FP')
         if self.read_code != None:
             return self.buildReadCode('readIntRegOperand')
-        int_reg_val = 'xc->readIntRegOperand(this, %d)' % self.src_reg_idx
+        int_reg_val = 'xc->readIntRegOperand(this, _srcMapCompileToExec[%d])' \
+                      % self.src_reg_idx
         return '%s = %s;\n' % (self.base_name, int_reg_val)
 
     def makeWrite(self):
@@ -557,8 +560,10 @@
     def makeConstructor(self):
         c = ''
         if self.is_src:
-            c += '\n\t_srcRegIdx[%d] = %s + FP_Base_DepTag;' % \
-                 (self.src_reg_idx, self.reg_spec)
+            c += '''
+                    _srcRegIdx[_numSrcRegs] = %s + FP_Base_DepTag;
+                    _srcMapCompileToExec[%d] = _numSrcRegs++;
+            ''' % (self.reg_spec, self.src_reg_idx)
         if self.is_dest:
             c += '\n\t_destRegIdx[%d] = %s + FP_Base_DepTag;' % \
                  (self.dest_reg_idx, self.reg_spec)
@@ -572,7 +577,7 @@
             func = 'readFloatRegOperandBits'
         if self.read_code != None:
             return self.buildReadCode(func)
-        return '%s = xc->%s(this, %d);\n' % \
+        return '%s = xc->%s(this, _srcMapCompileToExec[%d]);\n' % \
             (self.base_name, func, self.src_reg_idx)
 
     def makeWrite(self):
@@ -600,8 +605,10 @@
     def makeConstructor(self):
         c = ''
         if self.is_src:
-            c += '\n\t_srcRegIdx[%d] = %s + Ctrl_Base_DepTag;' % \
-                 (self.src_reg_idx, self.reg_spec)
+            c += '''
+                    _srcRegIdx[_numSrcRegs] = %s + Ctrl_Base_DepTag;
+                    _srcMapCompileToExec[%d] = _numSrcRegs++;
+            ''' % (self.reg_spec, self.src_reg_idx)
         if self.is_dest:
             c += '\n\t_destRegIdx[%d] = %s + Ctrl_Base_DepTag;' % \
                  (self.dest_reg_idx, self.reg_spec)
@@ -613,8 +620,8 @@
             error('Attempt to read control register as FP')
         if self.read_code != None:
             return self.buildReadCode('readMiscRegOperand')
-        return '%s = xc->readMiscRegOperand(this, %s);\n' % \
-            (self.base_name, self.src_reg_idx)
+        return '%s = xc->readMiscRegOperand(this, _srcMapCompileToExec[%d]);\n'\
+            % (self.base_name, self.src_reg_idx)
 
     def makeWrite(self):
         if (self.ctype == 'float' or self.ctype == 'double'):
@@ -902,9 +909,8 @@
         self.snippets = snippets
 
         self.operands = OperandList(parser, compositeCode)
-        self.constructor = self.operands.concatAttrStrings('constructor')
-        self.constructor += \
-                 '\n\t_numSrcRegs = %d;' % self.operands.numSrcRegs
+        self.constructor = '\n\t_numSrcRegs = 0;'
+        self.constructor += self.operands.concatAttrStrings('constructor')
         self.constructor += \
                  '\n\t_numDestRegs = %d;' % self.operands.numDestRegs
         self.constructor += \
diff -r def937c27f54 -r c8c03cb78aa1 src/cpu/static_inst.hh
--- a/src/cpu/static_inst.hh	Tue Apr 24 08:16:11 2012 -0500
+++ b/src/cpu/static_inst.hh	Tue Apr 24 16:13:34 2012 -0500
@@ -307,6 +307,8 @@
     RegIndex _destRegIdx[MaxInstDestRegs];
     /// See srcRegIdx().
     RegIndex _srcRegIdx[MaxInstSrcRegs];
+    /// maps compile time order of operands to run time order.
+    uint32_t _srcMapCompileToExec[MaxInstSrcRegs];
 
     /**
      * Base mnemonic (e.g., "add").  Used by generateDisassembly()