diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/insts/micromediaop.hh --- a/src/arch/x86/insts/micromediaop.hh Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/insts/micromediaop.hh Sat Apr 21 15:20:08 2012 -0500 @@ -49,6 +49,8 @@ const uint8_t srcSize; const uint8_t destSize; const uint8_t pred; + const uint8_t cc; + const uint16_t ext; static const RegIndex foldOBit = 0; // Constructor @@ -56,11 +58,11 @@ const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _dest, uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, - OpClass __opClass) : + uint16_t _ext, OpClass __opClass) : X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass), - src1(_src1.idx), dest(_dest.idx), - srcSize(_srcSize), destSize(_destSize), pred(_pred) + src1(_src1.idx), dest(_dest.idx), srcSize(_srcSize), + destSize(_destSize), pred(_pred), cc(0), ext(_ext) {} bool @@ -98,9 +100,9 @@ const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, - OpClass __opClass) : + uint16_t _ext, OpClass __opClass) : MediaOpBase(_machInst, mnem, _instMnem, setFlags, - _src1, _dest, _srcSize, _destSize, _pred, + _src1, _dest, _srcSize, _destSize, _pred, _ext, __opClass), src2(_src2.idx) {} @@ -119,9 +121,9 @@ const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest, uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, - OpClass __opClass) : + uint16_t _ext, OpClass __opClass) : MediaOpBase(_machInst, mnem, _instMnem, setFlags, - _src1, _dest, _srcSize, _destSize, _pred, + _src1, _dest, _srcSize, _destSize, _pred, _ext, __opClass), imm8(_imm8) {} diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/insts/microop.hh --- a/src/arch/x86/insts/microop.hh Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/insts/microop.hh Sat Apr 21 15:20:08 2012 -0500 @@ -122,6 +122,15 @@ } bool checkCondition(uint64_t flags, int condition) const; + bool needToRead(uint8_t readFlags, uint16_t writeFlags) const + { + return true; + } + + bool needToWrite(uint16_t condition) const + { + return true; + } void advancePC(PCState &pcState) const diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/insts/microregop.hh --- a/src/arch/x86/insts/microregop.hh Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/insts/microregop.hh Sat Apr 21 15:20:08 2012 -0500 @@ -53,6 +53,7 @@ const RegIndex src1; const RegIndex dest; const uint8_t dataSize; + const uint8_t cc; const uint16_t ext; RegIndex foldOBit; @@ -60,12 +61,12 @@ RegOpBase(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext, + uint8_t _dataSize, uint8_t _cc, uint16_t _ext, OpClass __opClass) : X86MicroopBase(_machInst, mnem, _instMnem, setFlags, __opClass), src1(_src1.idx), dest(_dest.idx), - dataSize(_dataSize), ext(_ext) + dataSize(_dataSize), cc(_cc), ext(_ext) { foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; } @@ -85,10 +86,10 @@ RegOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext, + uint8_t _dataSize, uint8_t _cc, uint16_t _ext, OpClass __opClass) : RegOpBase(_machInst, mnem, _instMnem, setFlags, - _src1, _dest, _dataSize, _ext, + _src1, _dest, _dataSize, _cc, _ext, __opClass), src2(_src2.idx) { @@ -107,10 +108,10 @@ RegOpImm(ExtMachInst _machInst, const char * mnem, const char *_instMnem, uint64_t setFlags, InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext, + uint8_t _dataSize, uint8_t _cc, uint16_t _ext, OpClass __opClass) : RegOpBase(_machInst, mnem, _instMnem, setFlags, - _src1, _dest, _dataSize, _ext, + _src1, _dest, _dataSize, _cc, _ext, __opClass), imm8(_imm8) { diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/microops/debug.isa --- a/src/arch/x86/isa/microops/debug.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/microops/debug.isa Sat Apr 21 15:20:08 2012 -0500 @@ -49,13 +49,14 @@ DebugFunc func; std::string message; uint8_t cc; + uint16_t ext; public: MicroDebugBase(ExtMachInst machInst, const char * mnem, const char * instMnem, uint64_t setFlags, DebugFunc _func, std::string _message, uint8_t _cc) : X86MicroopBase(machInst, mnem, instMnem, setFlags, No_OpClass), - func(_func), message(_message), cc(_cc) + func(_func), message(_message), cc(_cc), ext(0) {} std::string diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/microops/mediaop.isa --- a/src/arch/x86/isa/microops/mediaop.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/microops/mediaop.isa Sat Apr 21 15:20:08 2012 -0500 @@ -53,7 +53,8 @@ %(class_name)s(ExtMachInst _machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, - uint8_t _srcSize, uint8_t _destSize, uint16_t _pred); + uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, + uint16_t _ext); %(BasicExecDeclare)s }; @@ -67,7 +68,8 @@ %(class_name)s(ExtMachInst _machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest, - uint8_t _srcSize, uint8_t _destSize, uint16_t _pred); + uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, + uint16_t _ext); %(BasicExecDeclare)s }; @@ -77,9 +79,9 @@ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, - uint8_t _srcSize, uint8_t _destSize, uint16_t _pred) : + uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, - _src1, _src2, _dest, _srcSize, _destSize, _pred, + _src1, _src2, _dest, _srcSize, _destSize, _pred, _ext, %(op_class)s) { %(constructor)s; @@ -90,9 +92,9 @@ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest, - uint8_t _srcSize, uint8_t _destSize, uint16_t _pred) : + uint8_t _srcSize, uint8_t _destSize, uint8_t _pred, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, - _src1, _imm8, _dest, _srcSize, _destSize, _pred, + _src1, _imm8, _dest, _srcSize, _destSize, _pred, _ext, %(op_class)s) { %(constructor)s; @@ -213,6 +215,7 @@ self.pred = 0 else: self.pred = pred + self.ext = 0 def getAllocator(self, microFlags): className = self.className @@ -220,14 +223,14 @@ className += "Imm" allocator = '''new %(class_name)s(machInst, macrocodeBlock, %(flags)s, %(src1)s, %(op2)s, %(dest)s, - %(srcSize)s, %(destSize)s, %(pred)s)''' % { + %(srcSize)s, %(destSize)s, %(pred)s, %(ext)s)''' % { "class_name" : className, "flags" : self.microFlagsText(microFlags), "src1" : self.src1, "op2" : self.op2, "dest" : self.dest, "srcSize" : self.srcSize, "destSize" : self.destSize, - "pred" : self.pred} + "pred" : self.pred, "ext" : self.ext} return allocator class Mov2int(MediaOp): diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/microops/regop.isa --- a/src/arch/x86/isa/microops/regop.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/microops/regop.isa Sat Apr 21 15:20:08 2012 -0500 @@ -109,7 +109,7 @@ %(class_name)s(ExtMachInst _machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext); + uint8_t _dataSize, uint8_t _cc, uint16_t _ext); %(BasicExecDeclare)s }; @@ -123,7 +123,7 @@ %(class_name)s(ExtMachInst _machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext); + uint8_t _dataSize, uint8_t _cc, uint16_t _ext); %(BasicExecDeclare)s }; @@ -133,9 +133,9 @@ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext) : + uint8_t _dataSize, uint8_t _cc, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, - _src1, _src2, _dest, _dataSize, _ext, + _src1, _src2, _dest, _dataSize, _cc, _ext, %(op_class)s) { %(constructor)s; @@ -147,9 +147,9 @@ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, uint64_t setFlags, InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest, - uint8_t _dataSize, uint16_t _ext) : + uint8_t _dataSize, uint8_t _cc, uint16_t _ext) : %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, - _src1, _imm8, _dest, _dataSize, _ext, + _src1, _imm8, _dest, _dataSize, _cc, _ext, %(op_class)s) { %(constructor)s; @@ -388,6 +388,7 @@ self.op2 = op2 self.flags = flags self.dataSize = dataSize + self.cc = 0 if flags is None: self.ext = 0 else: @@ -405,10 +406,10 @@ (%(dataSize)s >= 4) ? (StaticInstPtr)(new %(class_name)sBig(machInst, macrocodeBlock, %(flags)s, %(src1)s, %(op2)s, - %(dest)s, %(dataSize)s, %(ext)s)) : + %(dest)s, %(dataSize)s, %(cc)s, %(ext)s)) : (StaticInstPtr)(new %(class_name)s(machInst, macrocodeBlock, %(flags)s, %(src1)s, %(op2)s, - %(dest)s, %(dataSize)s, %(ext)s)) + %(dest)s, %(dataSize)s, %(cc)s, %(ext)s)) ''' allocator = allocString % { "class_name" : className, @@ -416,7 +417,7 @@ "src1" : self.src1, "op2" : self.op2, "dest" : self.dest, "dataSize" : self.dataSize, - "ext" : self.ext} + "cc" : self.cc, "ext" : self.ext} return allocator else: className = self.className @@ -424,13 +425,13 @@ className += "Imm" allocator = '''new %(class_name)s(machInst, macrocodeBlock, %(flags)s, %(src1)s, %(op2)s, %(dest)s, - %(dataSize)s, %(ext)s)''' % { + %(dataSize)s, %(cc)s, %(ext)s)''' % { "class_name" : className, "flags" : self.microFlagsText(microFlags), "src1" : self.src1, "op2" : self.op2, "dest" : self.dest, "dataSize" : self.dataSize, - "ext" : self.ext} + "cc" : self.cc, "ext" : self.ext} return allocator class LogicRegOp(RegOp): diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/microops/seqop.isa --- a/src/arch/x86/isa/microops/seqop.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/microops/seqop.isa Sat Apr 21 15:20:08 2012 -0500 @@ -41,6 +41,7 @@ protected: uint16_t target; uint8_t cc; + uint16_t ext; public: SeqOpBase(ExtMachInst _machInst, const char * instMnem, @@ -88,7 +89,7 @@ ExtMachInst machInst, const char * mnemonic, const char * instMnem, uint64_t setFlags, uint16_t _target, uint8_t _cc) : X86MicroopBase(machInst, mnemonic, instMnem, setFlags, No_OpClass), - target(_target), cc(_cc) + target(_target), cc(_cc), ext(0) { } }}; diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/microops/specop.isa --- a/src/arch/x86/isa/microops/specop.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/microops/specop.isa Sat Apr 21 15:20:08 2012 -0500 @@ -48,6 +48,7 @@ protected: Fault fault; uint8_t cc; + uint16_t ext; public: MicroFaultBase(ExtMachInst _machInst, const char * instMnem, @@ -116,7 +117,7 @@ ExtMachInst machInst, const char * instMnem, uint64_t setFlags, Fault _fault, uint8_t _cc) : X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass), - fault(_fault), cc(_cc) + fault(_fault), cc(_cc), ext(0) { } }}; diff -r 1f53c161140e -r 1c063dca6858 src/arch/x86/isa/operands.isa --- a/src/arch/x86/isa/operands.isa Sat Apr 21 15:18:05 2012 -0500 +++ b/src/arch/x86/isa/operands.isa Sat Apr 21 15:20:08 2012 -0500 @@ -118,7 +118,8 @@ (None, None, 'IsControl'), 50), # This holds the condition code portion of the flag register. The # nccFlagBits version holds the rest. - 'ccFlagBits': intReg('INTREG_PSEUDO(0)', 60), + 'ccFlagBits': ('IntReg', 'uqw', 'INTREG_PSEUDO(0)', 'IsInteger', 60, + None, None, 'needToRead(cc,ext)', 'needToWrite(ext)'), # These register should needs to be more protected so that later # instructions don't map their indexes with an old value. 'nccFlagBits': controlReg('MISCREG_RFLAGS', 61),