diff -r 75614f0a05b3 -r 9f4b88e120e7 src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc	Sun May 27 14:43:02 2012 -0700
+++ b/src/arch/x86/tlb.cc	Sun May 27 14:43:59 2012 -0700
@@ -269,15 +269,10 @@
             }
             Addr base = tc->readMiscRegNoEffect(MISCREG_SEG_BASE(seg));
             Addr limit = tc->readMiscRegNoEffect(MISCREG_SEG_LIMIT(seg));
-            // This assumes we're not in 64 bit mode. If we were, the default
-            // address size is 64 bits, overridable to 32.
-            int size = 32;
             bool sizeOverride = (flags & (AddrSizeFlagBit << FlagShift));
-            SegAttr csAttr = tc->readMiscRegNoEffect(MISCREG_CS_ATTR);
-            if ((csAttr.defaultSize && sizeOverride) ||
-                    (!csAttr.defaultSize && !sizeOverride))
-                size = 16;
-            Addr offset = bits(vaddr - base, size-1, 0);
+            int logSize = sizeOverride ? m5Reg.altAddr : m5Reg.defAddr;
+            int size = (1 << logSize) * 8;
+            Addr offset = bits(vaddr - base, size - 1, 0);
             Addr endOffset = offset + req->getSize() - 1;
             if (expandDown) {
                 DPRINTF(TLB, "Checking an expand down segment.\n");