diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -47,7 +47,6 @@
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "mem/fs_translating_port_proxy.hh"
-#include "params/BaseCPU.hh"
 #include "sim/full_system.hh"
 
 namespace ArmISA {
@@ -56,10 +55,8 @@
 initCPU(ThreadContext *tc, int cpuId)
 {
     // Reset CP15?? What does that mean -- ali
-    
+
     // FPEXC.EN = 0
-    if (tc->getCpuPtr()->params()->defer_registration)
-       return;
 
     static Fault reset = new Reset;
     reset->invoke(tc);
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -792,7 +792,7 @@
         thread[tid]->initMemProxies(thread[tid]->getTC());
     }
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         for (ThreadID tid = 0; tid < numThreads; tid++) {
             ThreadContext *src_tc = threadContexts[tid];
             TheISA::initCPU(src_tc, src_tc->contextId());
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -86,7 +86,7 @@
     // Initialise the ThreadContext's memory proxies
     tcBase()->initMemProxies(tcBase());
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         ThreadID size = threadContexts.size();
         for (ThreadID i = 0; i < size; ++i) {
             ThreadContext *tc = threadContexts[i];
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -68,7 +68,7 @@
     // Initialise the ThreadContext's memory proxies
     tcBase()->initMemProxies(tcBase());
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         for (int i = 0; i < threadContexts.size(); ++i) {
             ThreadContext *tc = threadContexts[i];
             // initialize CPU, including PC