diff -r fa77985a87c6 -r 2c885cc35e9d src/arch/arm/isa/insts/data.isa
--- a/src/arch/arm/isa/insts/data.isa	Mon Jun 11 11:07:42 2012 -0400
+++ b/src/arch/arm/isa/insts/data.isa	Wed Jun 27 11:11:09 2012 -0400
@@ -293,7 +293,7 @@
     buildDataInst("orr", "Dest = resTemp = Op1 | secondOp;")
     buildDataInst("orn", "Dest = resTemp = Op1 | ~secondOp;", aiw = False)
     buildDataInst("mov", "Dest = resTemp = secondOp;", regRegAiw = False,
-                  isRasPop = "op1 == INTREG_LR", isBranch = "dest == INTREG_PC")
+                  isRasPop = "op2 == INTREG_LR", isBranch = "dest == INTREG_PC")
     buildDataInst("bic", "Dest = resTemp = Op1 & ~secondOp;")
     buildDataInst("mvn", "Dest = resTemp = ~secondOp;")
     buildDataInst("movt",
diff -r fa77985a87c6 -r 2c885cc35e9d src/arch/arm/isa/templates/pred.isa
--- a/src/arch/arm/isa/templates/pred.isa	Mon Jun 11 11:07:42 2012 -0400
+++ b/src/arch/arm/isa/templates/pred.isa	Wed Jun 27 11:11:09 2012 -0400
@@ -115,11 +115,12 @@
                 flags[IsUncondControl] = true;
             else
                 flags[IsCondControl] = true;
+
+            if (%(is_ras_pop)s) {
+                flags[IsReturn] = true;
+            }
         }
 
-        if (%(is_ras_pop)s) {
-            flags[IsReturn] = true;
-        }
     }
 }};