diff -r 049a08351e7d -r 93d82aae1592 src/base/types.hh --- a/src/base/types.hh Thu Jul 26 08:26:12 2012 +0100 +++ b/src/base/types.hh Thu Jul 26 14:52:16 2012 +0100 @@ -51,13 +51,11 @@ typedef int64_t Counter; /** - * Clock cycle count type. - * @note using an unsigned breaks the cache. + * Tick count type. */ -typedef int64_t Tick; -typedef uint64_t UTick; +typedef uint64_t Tick; -const Tick MaxTick = LL(0x7fffffffffffffff); +const Tick MaxTick = ULL(0xffffffffffffffff); /** * Address type diff -r 049a08351e7d -r 93d82aae1592 src/cpu/o3/cpu.cc --- a/src/cpu/o3/cpu.cc Thu Jul 26 08:26:12 2012 +0100 +++ b/src/cpu/o3/cpu.cc Thu Jul 26 14:52:16 2012 +0100 @@ -388,7 +388,7 @@ lastRunningCycle = curTick(); - lastActivatedCycle = -1; + lastActivatedCycle = 0; #if 0 // Give renameMap & rename stage access to the freeList; for (ThreadID tid = 0; tid < numThreads; tid++) @@ -752,7 +752,9 @@ activateThread(tid); } - if (lastActivatedCycle < curTick()) { + // If we are time 0 or if the last activation time is in the past, + // schedule the next tick and wake up the fetch unit + if (lastActivatedCycle == 0 || lastActivatedCycle < curTick()) { scheduleTickEvent(delay); // Be sure to signal that there's some activity so the CPU doesn't diff -r 049a08351e7d -r 93d82aae1592 src/sim/eventq.hh --- a/src/sim/eventq.hh Thu Jul 26 08:26:12 2012 +0100 +++ b/src/sim/eventq.hh Thu Jul 26 14:52:16 2012 +0100 @@ -481,9 +481,7 @@ inline void EventQueue::schedule(Event *event, Tick when) { - // Typecasting Tick->Utick here since gcc - // complains about signed overflow - assert((UTick)when >= (UTick)curTick()); + assert(when >= curTick()); assert(!event->scheduled()); assert(event->initialized()); @@ -520,9 +518,7 @@ inline void EventQueue::reschedule(Event *event, Tick when, bool always) { - // Typecasting Tick->Utick here since gcc - // complains about signed overflow - assert((UTick)when >= (UTick)curTick()); + assert(when >= curTick()); assert(always || event->scheduled()); assert(event->initialized());