diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MESI_CMP_directory-L1cache.sm
--- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -126,7 +126,7 @@
     bool isPresent(Address);
   }
 
-  TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
+  TBETable L1_TBEs, template="<L1Cache_TBE>";
 
   MessageBuffer mandatoryQueue, ordered="false";
 
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -151,7 +151,7 @@
     bool isPresent(Address);
   }
 
-  TBETable L2_TBEs, template_hack="<L2Cache_TBE>";
+  TBETable L2_TBEs, template="<L2Cache_TBE>";
 
   void set_cache_entry(AbstractCacheEntry a);
   void unset_cache_entry();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MESI_CMP_directory-dir.sm
--- a/src/mem/protocol/MESI_CMP_directory-dir.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MESI_CMP_directory-dir.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -105,7 +105,7 @@
 
   // ** OBJECTS **
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE tbe);
   void unset_tbe();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MI_example-cache.sm
--- a/src/mem/protocol/MI_example-cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MI_example-cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -70,7 +70,7 @@
 
 
   // STRUCTURES
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
   // PROTOTYPES
   void set_cache_entry(AbstractCacheEntry a);
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MI_example-dir.sm
--- a/src/mem/protocol/MI_example-dir.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MI_example-dir.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -74,7 +74,7 @@
   }
 
   // ** OBJECTS **
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE b);
   void unset_tbe();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_directory-L1cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -142,7 +142,7 @@
 
   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
   TimerTable useTimerTable;
   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
 
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -225,8 +225,8 @@
   }
 
 
-  TBETable TBEs, template_hack="<L2Cache_TBE>";
-  PerfectCacheMemory localDirectory, template_hack="<L2Cache_DirEntry>";
+  TBETable TBEs, template="<L2Cache_TBE>";
+  PerfectCacheMemory localDirectory, template="<L2Cache_DirEntry>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_directory-dir.sm
--- a/src/mem/protocol/MOESI_CMP_directory-dir.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -121,7 +121,7 @@
   }
 
   // ** OBJECTS **
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE b);
   void unset_tbe();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_directory-dma.sm
--- a/src/mem/protocol/MOESI_CMP_directory-dma.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -48,7 +48,7 @@
 
   MessageBuffer mandatoryQueue, ordered="false";
   MessageBuffer triggerQueue, ordered="true";
-  TBETable TBEs, template_hack="<DMA_TBE>";
+  TBETable TBEs, template="<DMA_TBE>";
   State cur_state;
 
   void set_tbe(TBE b);
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_token-L1cache.sm
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -180,7 +180,7 @@
   void wakeUpAllBuffers();
   void wakeUpBuffers(Address a);
 
-  TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
+  TBETable L1_TBEs, template="<L1Cache_TBE>";
 
   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_token-L2cache.sm
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -146,7 +146,7 @@
   }
 
   PersistentTable persistentTable;
-  PerfectCacheMemory localDirectory, template_hack="<L2Cache_DirEntry>";
+  PerfectCacheMemory localDirectory, template="<L2Cache_DirEntry>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_CMP_token-dir.sm
--- a/src/mem/protocol/MOESI_CMP_token-dir.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_CMP_token-dir.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -157,7 +157,7 @@
   PersistentTable persistentTable;
   TimerTable reissueTimerTable;
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   bool starving, default="false";
   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_hammer-cache.sm
--- a/src/mem/protocol/MOESI_hammer-cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_hammer-cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -173,7 +173,7 @@
     bool isPresent(Address);
   }
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/MOESI_hammer-dir.sm
--- a/src/mem/protocol/MOESI_hammer-dir.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/MOESI_hammer-dir.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -184,7 +184,7 @@
 
   Set fwd_set;
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   Entry getDirectoryEntry(Address addr), return_by_pointer="yes" {
     Entry dir_entry := static_cast(Entry, "pointer", directory[addr]);
diff -r 3985adebd792 -r 521738e205cc src/mem/protocol/Network_test-cache.sm
--- a/src/mem/protocol/Network_test-cache.sm	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/protocol/Network_test-cache.sm	Mon Sep 24 20:08:50 2012 -0500
@@ -82,7 +82,7 @@
 
   // STRUCTURES
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
 
   // FUNCTIONS
diff -r 3985adebd792 -r 521738e205cc src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py	Mon Sep 24 20:07:30 2012 -0500
+++ b/src/mem/slicc/symbols/StateMachine.py	Mon Sep 24 20:08:50 2012 -0500
@@ -385,7 +385,7 @@
 // Objects
 ''')
         for var in self.objects:
-            th = var.get("template_hack", "")
+            th = var.get("template", "")
             code('${{var.type.c_ident}}$th* m_${{var.c_ident}}_ptr;')
 
             if var.type.ident == "MessageBuffer":
@@ -568,7 +568,7 @@
                     if "factory" in var:
                         code('$vid = ${{var["factory"]}};')
                     elif var.ident.find("mandatoryQueue") < 0:
-                        th = var.get("template_hack", "")
+                        th = var.get("template", "")
                         expr = "%s  = new %s%s" % (vid, vtype.c_ident, th)
 
                         args = ""