diff -r 165f9a435249 -r 9d75feaa7b50 src/dev/Ethernet.py
--- a/src/dev/Ethernet.py	Thu Dec 06 22:21:29 2012 -0600
+++ b/src/dev/Ethernet.py	Thu Dec 06 22:21:30 2012 -0600
@@ -138,7 +138,7 @@
         "Ethernet Hardware Address")
 
     # Override the default clock
-    clock = '0ns'
+    clock = '500MHz'
 
     dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
     dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
diff -r 165f9a435249 -r 9d75feaa7b50 src/dev/ns_gige.cc
--- a/src/dev/ns_gige.cc	Thu Dec 06 22:21:29 2012 -0600
+++ b/src/dev/ns_gige.cc	Thu Dec 06 22:21:30 2012 -0600
@@ -1138,17 +1138,15 @@
     uint32_t &extsts = is64bit ? rxDesc64.extsts : rxDesc32.extsts;
 
   next:
-    if (clock) {
-        if (rxKickTick > curTick()) {
-            DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n",
-                    rxKickTick);
+    if (rxKickTick > curTick()) {
+        DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n",
+                rxKickTick);
 
-            goto exit;
-        }
+        goto exit;
+    }
 
-        // Go to the next state machine clock tick.
-        rxKickTick = curTick() + clockPeriod();
-    }
+    // Go to the next state machine clock tick.
+    rxKickTick = clockEdge(Cycles(1));
 
     switch(rxDmaState) {
       case dmaReadWaiting:
@@ -1457,7 +1455,7 @@
     DPRINTF(EthernetSM, "rx state machine exited rxState=%s\n",
             NsRxStateStrings[rxState]);
 
-    if (clock && !rxKickEvent.scheduled())
+    if (!rxKickEvent.scheduled())
         schedule(rxKickEvent, rxKickTick);
 }
 
@@ -1586,16 +1584,14 @@
     uint32_t &extsts = is64bit ? txDesc64.extsts : txDesc32.extsts;
 
   next:
-    if (clock) {
-        if (txKickTick > curTick()) {
-            DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n",
-                    txKickTick);
-            goto exit;
-        }
+    if (txKickTick > curTick()) {
+        DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n",
+                txKickTick);
+        goto exit;
+    }
 
-        // Go to the next state machine clock tick.
-        txKickTick = curTick() + clockPeriod();
-    }
+    // Go to the next state machine clock tick.
+    txKickTick = clockEdge(Cycles(1));
 
     switch(txDmaState) {
       case dmaReadWaiting:
@@ -1900,7 +1896,7 @@
     DPRINTF(EthernetSM, "tx state machine exited txState=%s\n",
             NsTxStateStrings[txState]);
 
-    if (clock && !txKickEvent.scheduled())
+    if (!txKickEvent.scheduled())
         schedule(txKickEvent, txKickTick);
 }
 
@@ -2015,7 +2011,7 @@
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    reschedule(txEvent, curTick() + clockPeriod(), true);
+    reschedule(txEvent, clockEdge(Cycles(1)), true);
 }
 
 bool
diff -r 165f9a435249 -r 9d75feaa7b50 src/dev/sinic.cc
--- a/src/dev/sinic.cc	Thu Dec 06 22:21:29 2012 -0600
+++ b/src/dev/sinic.cc	Thu Dec 06 22:21:30 2012 -0600
@@ -1159,7 +1159,7 @@
 
     DPRINTF(Ethernet, "transfer complete: data in txFifo...schedule xmit\n");
 
-    reschedule(txEvent, curTick() + clockPeriod(), true);
+    reschedule(txEvent, clockEdge(Cycles(1)), true);
 }
 
 bool