diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc
--- a/src/mem/ruby/slicc_interface/RubyRequest.cc
+++ b/src/mem/ruby/slicc_interface/RubyRequest.cc
@@ -1,5 +1,6 @@
 #include <iostream>
 
+#include "base/addr_range.hh"
 #include "mem/ruby/slicc_interface/RubyRequest.hh"
 
 using namespace std;
@@ -39,19 +40,24 @@
     // has to overwrite the data for the timing request, even if the
     // timing request has still not been ordered globally.
 
-    Address pktLineAddr(pkt->getAddr());
-    pktLineAddr.makeLineAddress();
+    uint64_t pktBase = pkt->getAddr();
+    uint64_t pktTail = pktBase + pkt->getSize();
+    AddrRange pktRange(pktBase, pktTail);
+    uint64_t reqBase = m_PhysicalAddress.getAddress();
+    uint64_t reqTail = reqBase + m_Size;
+    AddrRange reqRange(reqBase, reqTail);
 
-    if (pktLineAddr == m_LineAddress) {
-        uint8_t *pktData = pkt->getPtr<uint8_t>(true);
-        unsigned int size_in_bytes = pkt->getSize();
-        unsigned startByte = pkt->getAddr() - m_LineAddress.getAddress();
+    if (pktRange.intersects(reqRange)) {
 
-        for (unsigned i = 0; i < size_in_bytes; ++i) {
-            data[i + startByte] = pktData[i];
+      uint8_t * pktData = pkt->getPtr<uint8_t>(true);
+
+      for (uint64_t i = pktBase; i < pktTail; ++i) {
+        if (i < reqTail && i >= reqBase) {
+          data[i - reqBase] = pktData[i - pktBase];
         }
+      }
+      return true;
+    }
 
-        return true;
-    }
     return false;
 }