diff -r 890fc69ba53c -r f490aefa53d3 src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh	Thu Jan 31 21:26:29 2013 -0600
+++ b/src/cpu/o3/fetch_impl.hh	Thu Feb 07 12:31:40 2013 +0100
@@ -435,8 +435,6 @@
         assert(!stalls[i].commit);
         assert(fetchStatus[i] == Idle || stalls[i].drain);
     }
-
-    branchPred->drainSanityCheck();
 }
 
 template <class Impl>
diff -r 890fc69ba53c -r f490aefa53d3 src/cpu/pred/bpred_unit.hh
--- a/src/cpu/pred/bpred_unit.hh	Thu Jan 31 21:26:29 2013 -0600
+++ b/src/cpu/pred/bpred_unit.hh	Thu Feb 07 12:31:40 2013 +0100
@@ -76,9 +76,6 @@
      */
     void regStats();
 
-    /** Perform sanity checks after a drain. */
-    void drainSanityCheck() const;
-
     /**
      * Predicts whether or not the instruction is a taken branch, and the
      * target of the branch if it is taken.
diff -r 890fc69ba53c -r f490aefa53d3 src/cpu/pred/bpred_unit_impl.hh
--- a/src/cpu/pred/bpred_unit_impl.hh	Thu Jan 31 21:26:29 2013 -0600
+++ b/src/cpu/pred/bpred_unit_impl.hh	Thu Feb 07 12:31:40 2013 +0100
@@ -118,15 +118,6 @@
         ;
 }
 
-void
-BPredUnit::drainSanityCheck() const
-{
-    // We shouldn't have any outstanding requests when we resume from
-    // a drained system.
-    for (int i = 0; i < numThreads; ++i)
-        assert(predHist[i].empty());
-}
-
 bool
 BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
                    TheISA::PCState &pc, ThreadID tid)