diff -r 094bd79827a6 -r caf78f49b7b4 src/arch/alpha/linux/system.hh --- a/src/arch/alpha/linux/system.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/arch/alpha/linux/system.hh Thu Feb 14 11:04:07 2013 +0000 @@ -89,10 +89,13 @@ /** Event to halt the simulator if the kernel calls panic() */ BreakPCEvent *kernelPanicEvent; +#if 0 /** Event to halt the simulator if the kernel calls die_if_kernel */ BreakPCEvent *kernelDieEvent; #endif +#endif + /** * Event to skip determine_cpu_caches() because we don't support * the IPRs that the code can access to figure out cache sizes diff -r 094bd79827a6 -r caf78f49b7b4 src/arch/arm/isa/insts/neon.isa --- a/src/arch/arm/isa/insts/neon.isa Thu Feb 14 10:01:56 2013 +0000 +++ b/src/arch/arm/isa/insts/neon.isa Thu Feb 14 11:04:07 2013 +0000 @@ -2820,6 +2820,7 @@ 4, vcvts2fpCode, fromInt = True) vcvts2hCode = ''' + destElem = 0; FPSCR fpscr = (FPSCR) FpscrExc; float srcFp1 = bitsToFp(srcElem1, (float)0.0); if (flushToZero(srcFp1)) @@ -2836,6 +2837,7 @@ twoRegNarrowMiscInst("vcvt", "NVcvts2h", "SimdCvtOp", ("uint16_t",), vcvts2hCode) vcvth2sCode = ''' + destElem = 0; FPSCR fpscr = (FPSCR) FpscrExc; VfpSavedState state = prepFpState(VfpRoundNearest); __asm__ __volatile__("" : "=m" (srcElem1), "=m" (destElem) diff -r 094bd79827a6 -r caf78f49b7b4 src/arch/x86/interrupts.cc --- a/src/arch/x86/interrupts.cc Thu Feb 14 10:01:56 2013 +0000 +++ b/src/arch/x86/interrupts.cc Thu Feb 14 11:04:07 2013 +0000 @@ -627,7 +627,7 @@ pendingStartup(false), startupVector(0), startedUp(false), pendingUnmaskableInt(false), pendingIPIs(0), cpu(NULL), - intSlavePort(name() + ".int_slave", this, this, latency) + intSlavePort(name() + ".int_slave", this, this) { pioSize = PageBytes; memset(regs, 0, sizeof(regs)); diff -r 094bd79827a6 -r caf78f49b7b4 src/arch/x86/isa/decoder/one_byte_opcodes.isa --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa Thu Feb 14 10:01:56 2013 +0000 +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa Thu Feb 14 11:04:07 2013 +0000 @@ -399,8 +399,9 @@ // Really only the LSB matters, but the decoder // will sign extend it, and there's no easy way to // specify only checking the first byte. - -0x80: SyscallInst::int80('xc->syscall(Rax)', - IsSyscall, IsNonSpeculative, IsSerializeAfter); + 0xffffffffffffff80: + SyscallInst::int80('xc->syscall(Rax)', + IsSyscall, IsNonSpeculative, IsSerializeAfter); } } 0x6: decode MODE_SUBMODE { diff -r 094bd79827a6 -r caf78f49b7b4 src/base/statistics.hh --- a/src/base/statistics.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/base/statistics.hh Thu Feb 14 11:04:07 2013 +0000 @@ -1327,8 +1327,6 @@ Counter max_track; /** The number of entries in each bucket. */ Counter bucket_size; - /** The number of buckets. Equal to (max-min)/bucket_size. */ - size_type buckets; /** The smallest value sampled. */ Counter min_val; diff -r 094bd79827a6 -r caf78f49b7b4 src/cpu/testers/traffic_gen/traffic_gen.hh --- a/src/cpu/testers/traffic_gen/traffic_gen.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/cpu/testers/traffic_gen/traffic_gen.hh Thu Feb 14 11:04:07 2013 +0000 @@ -548,13 +548,6 @@ * state is complete. */ bool traceComplete; - - /** - * Used to store the Tick when the next generate should - * occur. It is to remove a transaction as soon as we - * enter the state. - */ - Tick oldEmitTime; }; /** Pointer to owner of request handler */ @@ -582,8 +575,7 @@ public: TrafficGenPort(const std::string& name, TrafficGen& _owner) - : QueuedMasterPort(name, &_owner, queue), queue(_owner, *this), - owner(_owner) + : QueuedMasterPort(name, &_owner, queue), queue(_owner, *this) { } protected: @@ -594,9 +586,6 @@ MasterPacketQueue queue; - // Owner of the port - TrafficGen& owner; - }; TrafficGenPort port; diff -r 094bd79827a6 -r caf78f49b7b4 src/dev/Ethernet.py --- a/src/dev/Ethernet.py Thu Feb 14 10:01:56 2013 +0000 +++ b/src/dev/Ethernet.py Thu Feb 14 11:04:07 2013 +0000 @@ -78,8 +78,6 @@ cxx_header = "dev/i8254xGBe.hh" hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") - use_flow_control = Param.Bool(False, - "Should we use xon/xoff flow contorl (UNIMPLEMENTD)") rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO") tx_fifo_size = Param.MemorySize('384kB', "Size of the tx FIFO") rx_desc_cache_size = Param.Int(64, diff -r 094bd79827a6 -r caf78f49b7b4 src/dev/alpha/tsunami_io.hh --- a/src/dev/alpha/tsunami_io.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/dev/alpha/tsunami_io.hh Thu Feb 14 11:04:07 2013 +0000 @@ -51,8 +51,6 @@ */ class TsunamiIO : public BasicPioDevice { - private: - struct tm tm; protected: diff -r 094bd79827a6 -r caf78f49b7b4 src/dev/i8254xGBe.hh --- a/src/dev/i8254xGBe.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/dev/i8254xGBe.hh Thu Feb 14 11:04:07 2013 +0000 @@ -70,9 +70,6 @@ // The drain event if we have one DrainManager *drainManager; - // cached parameters from params struct - bool useFlowControl; - // packet fifos PacketFifo rxFifo; PacketFifo txFifo; diff -r 094bd79827a6 -r caf78f49b7b4 src/dev/i8254xGBe.cc --- a/src/dev/i8254xGBe.cc Thu Feb 14 10:01:56 2013 +0000 +++ b/src/dev/i8254xGBe.cc Thu Feb 14 11:04:07 2013 +0000 @@ -58,7 +58,6 @@ IGbE::IGbE(const Params *p) : EtherDevice(p), etherInt(NULL), drainManager(NULL), - useFlowControl(p->use_flow_control), rxFifo(p->rx_fifo_size), txFifo(p->tx_fifo_size), rxTick(false), txTick(false), txFifoTick(false), rxDmaPacket(false), pktOffset(0), fetchDelay(p->fetch_delay), wbDelay(p->wb_delay), diff -r 094bd79827a6 -r caf78f49b7b4 src/dev/x86/intdev.hh --- a/src/dev/x86/intdev.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/dev/x86/intdev.hh Thu Feb 14 11:04:07 2013 +0000 @@ -66,11 +66,11 @@ class IntSlavePort : public MessageSlavePort { IntDev * device; - Tick latency; + public: IntSlavePort(const std::string& _name, MemObject* _parent, - IntDev* dev, Tick _latency) : - MessageSlavePort(_name, _parent), device(dev), latency(_latency) + IntDev* dev) : + MessageSlavePort(_name, _parent), device(dev) { } diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/common/Consumer.hh --- a/src/mem/ruby/common/Consumer.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/common/Consumer.hh Thu Feb 14 11:04:07 2013 +0000 @@ -44,7 +44,7 @@ { public: Consumer(ClockedObject *_em) - : m_last_scheduled_wakeup(0), m_last_wakeup(0), em(_em) + : m_last_scheduled_wakeup(0), em(_em) { } @@ -93,7 +93,6 @@ private: Tick m_last_scheduled_wakeup; std::set m_scheduled_wakeups; - Tick m_last_wakeup; ClockedObject *em; class ConsumerEvent : public Event diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/BlockBloomFilter.hh --- a/src/mem/ruby/filters/BlockBloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/BlockBloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -66,8 +66,6 @@ int m_filter_size; int m_filter_size_bits; - int m_count_bits; - int m_count; }; #endif // __MEM_RUBY_FILTERS_BLOCKBLOOMFILTER_HH__ diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/BulkBloomFilter.hh --- a/src/mem/ruby/filters/BulkBloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/BulkBloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -71,8 +71,6 @@ int m_sector_bits; - int m_count_bits; - int m_count; }; #endif // __MEM_RUBY_FILTERS_BULKBLOOMFILTER_HH__ diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/H3BloomFilter.hh --- a/src/mem/ruby/filters/H3BloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/H3BloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -80,9 +80,6 @@ int m_par_filter_size; int m_par_filter_size_bits; - int m_count_bits; - int m_count; - int primes_list[6];// = {9323,11279,10247,30637,25717,43711}; int mults_list[6]; //= {255,29,51,3,77,43}; int adds_list[6]; //= {841,627,1555,241,7777,65391}; diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/MultiBitSelBloomFilter.hh --- a/src/mem/ruby/filters/MultiBitSelBloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/MultiBitSelBloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -82,9 +82,6 @@ int m_par_filter_size; int m_par_filter_size_bits; - int m_count_bits; - int m_count; - bool isParallel; }; diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/MultiGrainBloomFilter.hh --- a/src/mem/ruby/filters/MultiGrainBloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/MultiGrainBloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -71,9 +71,6 @@ std::vector m_page_filter; int m_page_filter_size; int m_page_filter_size_bits; - - int m_count_bits; - int m_count; }; #endif // __MEM_RUBY_FILTERS_MULTIGRAINBLOOMFILTER_HH__ diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/filters/NonCountingBloomFilter.hh --- a/src/mem/ruby/filters/NonCountingBloomFilter.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/filters/NonCountingBloomFilter.hh Thu Feb 14 11:04:07 2013 +0000 @@ -73,9 +73,6 @@ int m_filter_size; int m_offset; int m_filter_size_bits; - - int m_count_bits; - int m_count; }; #endif // __MEM_RUBY_FILTERS_NONCOUNTINGBLOOMFILTER_HH__ diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh --- a/src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh Thu Feb 14 11:04:07 2013 +0000 @@ -75,7 +75,7 @@ private: std::vector m_buffer; - int size, max_size; + int max_size; }; inline std::ostream& diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh --- a/src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh Thu Feb 14 11:04:07 2013 +0000 @@ -58,7 +58,7 @@ private: std::vector m_buffer; - int size, max_size; + int max_size; }; inline std::ostream& diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/system/DMASequencer.hh --- a/src/mem/ruby/system/DMASequencer.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/system/DMASequencer.hh Thu Feb 14 11:04:07 2013 +0000 @@ -73,7 +73,6 @@ bool m_is_busy; uint64_t m_data_block_mask; DMARequest active_request; - int num_active_requests; }; #endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__ diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/system/RubyPort.hh --- a/src/mem/ruby/system/RubyPort.hh Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/system/RubyPort.hh Thu Feb 14 11:04:07 2013 +0000 @@ -99,8 +99,6 @@ MasterPacketQueue queue; - RubyPort *ruby_port; - public: PioPort(const std::string &_name, RubyPort *_port); diff -r 094bd79827a6 -r caf78f49b7b4 src/mem/ruby/system/RubyPort.cc --- a/src/mem/ruby/system/RubyPort.cc Thu Feb 14 10:01:56 2013 +0000 +++ b/src/mem/ruby/system/RubyPort.cc Thu Feb 14 11:04:07 2013 +0000 @@ -119,8 +119,7 @@ RubyPort::PioPort::PioPort(const std::string &_name, RubyPort *_port) - : QueuedMasterPort(_name, _port, queue), queue(*_port, *this), - ruby_port(_port) + : QueuedMasterPort(_name, _port, queue), queue(*_port, *this) { DPRINTF(RubyPort, "creating master port on ruby sequencer %s\n", _name); }