diff -r 1bd42a0ed424 -r 4a87fbab0988 src/mem/ruby/recorder/CacheRecorder.hh
--- a/src/mem/ruby/recorder/CacheRecorder.hh	Sun Apr 07 22:48:28 2013 -0500
+++ b/src/mem/ruby/recorder/CacheRecorder.hh	Sun Apr 07 22:48:38 2013 -0500
@@ -97,6 +97,13 @@
      */
     void enqueueNextFetchRequest();
 
+    /*!
+     * After warm-up and cool-down of caches, sequencer clocks may have been
+     * modified and will be incorrect unless reset before continuing simulation.
+     * Reset the clocks of the sequencers.
+     */
+    void updateSequencerClocks();
+
   private:
     // Private copy constructor and assignment operator
     CacheRecorder(const CacheRecorder& obj);
diff -r 1bd42a0ed424 -r 4a87fbab0988 src/mem/ruby/recorder/CacheRecorder.cc
--- a/src/mem/ruby/recorder/CacheRecorder.cc	Sun Apr 07 22:48:28 2013 -0500
+++ b/src/mem/ruby/recorder/CacheRecorder.cc	Sun Apr 07 22:48:38 2013 -0500
@@ -127,6 +127,15 @@
 }
 
 void
+CacheRecorder::updateSequencerClocks()
+{
+    for (int id = 0; id < m_seq_map.size(); id++) {
+        Sequencer *seq = m_seq_map[id];
+        if (seq) seq->updateClock();
+    }
+}
+
+void
 CacheRecorder::addRecord(int cntrl, const physical_address_t data_addr,
                          const physical_address_t pc_addr,
                          RubyRequestType type, Time time, DataBlock& data)
diff -r 1bd42a0ed424 -r 4a87fbab0988 src/mem/ruby/system/Sequencer.hh
--- a/src/mem/ruby/system/Sequencer.hh	Sun Apr 07 22:48:28 2013 -0500
+++ b/src/mem/ruby/system/Sequencer.hh	Sun Apr 07 22:48:38 2013 -0500
@@ -118,6 +118,9 @@
     void recordRequestType(SequencerRequestType requestType);
     Histogram& getOutstandReqHist() { return m_outstandReqHist; }
 
+    // Called by CacheRecorders after warm-up or cool-down to set current clock
+    void updateClock() { resetClock(); }
+
   private:
     void issueRequest(PacketPtr pkt, RubyRequestType type);
 
diff -r 1bd42a0ed424 -r 4a87fbab0988 src/mem/ruby/system/System.cc
--- a/src/mem/ruby/system/System.cc	Sun Apr 07 22:48:28 2013 -0500
+++ b/src/mem/ruby/system/System.cc	Sun Apr 07 22:48:38 2013 -0500
@@ -244,6 +244,7 @@
     eventq_head = eventq->replaceHead(eventq_head);
     // Restore curTick
     setCurTick(curtick_original);
+    m_cache_recorder->updateSequencerClocks();
 
     uint8_t *raw_data = NULL;
 
@@ -381,10 +382,6 @@
         enqueueRubyEvent(curTick());
         simulate();
 
-        delete m_cache_recorder;
-        m_cache_recorder = NULL;
-        m_warmup_enabled = false;
-
         // reset DRAM so that it's not waiting for events on the old event
         // queue
         for (int i = 0; i < m_memory_controller_vec.size(); ++i) {
@@ -396,6 +393,11 @@
         // Restore curTick and Ruby System's clock
         setCurTick(curtick_original);
         resetClock();
+        m_cache_recorder->updateSequencerClocks();
+
+        delete m_cache_recorder;
+        m_cache_recorder = NULL;
+        m_warmup_enabled = false;
     }
 }