diff -r 168de5ae3706 -r 74e0e1c18fba src/arch/arm/insts/macromem.hh
--- a/src/arch/arm/insts/macromem.hh	Fri Aug 13 12:04:24 2010 -0500
+++ b/src/arch/arm/insts/macromem.hh	Fri Aug 13 12:04:56 2010 -0500
@@ -94,6 +94,8 @@
               ura(_ura), urb(_urb), imm(_imm)
     {
     }
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
 /**
@@ -111,6 +113,8 @@
               up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord)
     {
     }
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
 /**
diff -r 168de5ae3706 -r 74e0e1c18fba src/arch/arm/insts/macromem.cc
--- a/src/arch/arm/insts/macromem.cc	Fri Aug 13 12:04:24 2010 -0500
+++ b/src/arch/arm/insts/macromem.cc	Fri Aug 13 12:04:56 2010 -0500
@@ -215,4 +215,31 @@
     }
 }
 
+std::string
+MicroIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+    std::stringstream ss;
+    printMnemonic(ss);
+    printReg(ss, ura);
+    ss << ", ";
+    printReg(ss, urb);
+    ss << ", ";
+    ccprintf(ss, "#%d", imm);
+    return ss.str();
 }
+
+std::string
+MicroMemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+    std::stringstream ss;
+    printMnemonic(ss);
+    printReg(ss, ura);
+    ss << ", [";
+    printReg(ss, urb);
+    ss << ", ";
+    ccprintf(ss, "#%d", imm);
+    ss << "]";
+    return ss.str();
+}
+
+}
diff -r 168de5ae3706 -r 74e0e1c18fba src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh	Fri Aug 13 12:04:24 2010 -0500
+++ b/src/cpu/o3/fetch_impl.hh	Fri Aug 13 12:04:56 2010 -0500
@@ -1162,7 +1162,8 @@
 #if TRACING_ON
                 instruction->traceData =
                     cpu->getTracer()->getInstRecord(curTick, cpu->tcBase(tid),
-                            instruction->staticInst, instruction->readPC());
+                            instruction->staticInst, instruction->readPC(),
+                            macroop, instruction->readMicroPC());
 #else
                 instruction->traceData = NULL;
 #endif