diff -r e672a39fd426 -r 2f0374a09fc5 src/arch/generic/mmapped_ipr.hh
--- a/src/arch/generic/mmapped_ipr.hh	Thu Oct 03 11:00:18 2013 +0200
+++ b/src/arch/generic/mmapped_ipr.hh	Thu Oct 03 15:06:29 2013 +0200
@@ -51,18 +51,18 @@
      * internal to gem5, for example gem5 pseudo-ops in virtualized
      * mode.
      *
-     * In order to make the IPR space manageable we always set bit 63
-     * (IPR_GENERIC) for accesses that should be handled by the
-     * generic ISA code. Architectures may use the rest of the IPR
-     * space internally.
+     * In order to make the IPR space manageable we reserve ASI 0xFF
+     * for IPRs that should be handled by the generic ISA
+     * code. Architectures may use the rest of the IPR space
+     * internally.
      */
 
-    /** Is this a generic IPR access? */
-    const Addr IPR_GENERIC = ULL(0x8000000000000000);
+    /** IPR ASI for generic accesses */
+    const Request::FlagsType IPR_GENERIC_ASI = 0xFF;
 
     /** @{ */
     /** Mask when extracting the class of a generic IPR */
-    const Addr IPR_CLASS_MASK = ULL(0x7FFF000000000000);
+    const Addr IPR_CLASS_MASK = ULL(0xFFFF000000000000);
     /** Shift amount when extracting the class of a generic IPR */
     const int IPR_CLASS_SHIFT = 48;
     /** @} */
@@ -94,7 +94,7 @@
     inline Addr
     iprAddressPseudoInst(uint8_t func, uint8_t subfunc)
     {
-        return IPR_GENERIC | (IPR_CLASS_PSEUDO_INST << IPR_CLASS_SHIFT)  |
+        return (IPR_CLASS_PSEUDO_INST << IPR_CLASS_SHIFT)  |
             (func << 8) | subfunc;
     }
 
@@ -113,7 +113,9 @@
     inline bool
     isGenericIprAccess(const Packet *pkt)
     {
-        return pkt->getAddr() & IPR_GENERIC;
+        Request::Flags flags(pkt->req->getFlags());
+        return (flags & Request::MMAPPED_IPR) &&
+            (flags & Request::ASI_BITS) == IPR_GENERIC_ASI;
     }
 
     /**
diff -r e672a39fd426 -r 2f0374a09fc5 src/arch/sparc/asi.hh
--- a/src/arch/sparc/asi.hh	Thu Oct 03 11:00:18 2013 +0200
+++ b/src/arch/sparc/asi.hh	Thu Oct 03 15:06:29 2013 +0200
@@ -245,6 +245,9 @@
     ASI_BLK_SL = 0xF9,
     ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL,
     // 0xFA-0xFF implementation dependent
+
+    // 0xFF is used internally by gem5.
+    ASI_GEM5_GENERIC_IPR = 0xFF,
     MAX_ASI = 0xFF
 };
 
diff -r e672a39fd426 -r 2f0374a09fc5 src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc	Thu Oct 03 11:00:18 2013 +0200
+++ b/src/arch/x86/tlb.cc	Thu Oct 03 15:06:29 2013 +0200
@@ -257,7 +257,7 @@
             req->setPaddr(x86LocalAPICAddress(tc->contextId(),
                                               paddr - apicRange.start()));
         } else if (m5opRange.contains(paddr)) {
-            req->setFlags(Request::MMAPPED_IPR);
+            req->setFlags(Request::MMAPPED_IPR | GenericISA::IPR_GENERIC_ASI);
             req->setPaddr(GenericISA::iprAddressPseudoInst(
                               (paddr >> 8) & 0xFF,
                               paddr & 0xFF));