diff -r 79fde1c67ed8 configs/example/se.py
--- a/configs/example/se.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/example/se.py	Sat Aug 23 18:28:24 2014 +0200
@@ -235,6 +235,8 @@
     Ruby.create_system(options, system)
     assert(options.num_cpus == len(system.ruby._cpu_ports))
 
+    system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
+                                        voltage_domain = system.voltage_domain)
     for i in xrange(np):
         ruby_port = system.ruby._cpu_ports[i]
 
diff -r 79fde1c67ed8 configs/ruby/MESI_Three_Level.py
--- a/configs/ruby/MESI_Three_Level.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MESI_Three_Level.py	Sat Aug 23 18:28:24 2014 +0200
@@ -102,9 +102,11 @@
             l0_cntrl = L0Cache_Controller(version = i*num_cpus_per_cluster + j,
                           Icache = l0i_cache, Dcache = l0d_cache,
                           send_evictions = (options.cpu_type == "detailed"),
+                          clk_domain=system.cpu[i].clk_domain,
                           ruby_system = ruby_system)
 
             cpu_seq = RubySequencer(version = i, icache = l0i_cache,
+                        clk_domain=system.cpu[i].clk_domain,
                         dcache = l0d_cache, ruby_system = ruby_system)
 
             l0_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 configs/ruby/MESI_Two_Level.py
--- a/configs/ruby/MESI_Two_Level.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MESI_Two_Level.py	Sat Aug 23 18:28:24 2014 +0200
@@ -95,12 +95,14 @@
                                           options.cpu_type == "detailed"),
                                       prefetcher = prefetcher,
                                       ruby_system = ruby_system,
+                                      clk_domain=system.cpu[i].clk_domain,
                                       transitions_per_cycle=options.ports,
                                       enable_prefetch = False)
 
         cpu_seq = RubySequencer(version = i,
                                 icache = l1i_cache,
                                 dcache = l1d_cache,
+                                clk_domain=system.cpu[i].clk_domain,
                                 ruby_system = ruby_system)
 
         l1_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 configs/ruby/MI_example.py
--- a/configs/ruby/MI_example.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MI_example.py	Sat Aug 23 18:28:24 2014 +0200
@@ -82,11 +82,13 @@
                                       send_evictions = (
                                           options.cpu_type == "detailed"),
                                       transitions_per_cycle = options.ports,
+                                      clk_domain=system.cpu[i].clk_domain,
                                       ruby_system = ruby_system)
 
         cpu_seq = RubySequencer(version = i,
                                 icache = cache,
                                 dcache = cache,
+                                clk_domain=system.cpu[i].clk_domain,
                                 ruby_system = ruby_system)
 
         l1_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 configs/ruby/MOESI_CMP_directory.py
--- a/configs/ruby/MOESI_CMP_directory.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MOESI_CMP_directory.py	Sat Aug 23 18:28:24 2014 +0200
@@ -92,11 +92,13 @@
                                       send_evictions = (
                                           options.cpu_type == "detailed"),
                                       transitions_per_cycle = options.ports,
+                                      clk_domain=system.cpu[i].clk_domain,
                                       ruby_system = ruby_system)
 
         cpu_seq = RubySequencer(version = i,
                                 icache = l1i_cache,
                                 dcache = l1d_cache,
+                                clk_domain=system.cpu[i].clk_domain,
                                 ruby_system = ruby_system)
 
         l1_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 configs/ruby/MOESI_CMP_token.py
--- a/configs/ruby/MOESI_CMP_token.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MOESI_CMP_token.py	Sat Aug 23 18:28:24 2014 +0200
@@ -112,11 +112,13 @@
                                       send_evictions = (
                                           options.cpu_type == "detailed"),
                                       transitions_per_cycle = options.ports,
+                                      clk_domain=system.cpu[i].clk_domain,
                                       ruby_system = ruby_system)
 
         cpu_seq = RubySequencer(version = i,
                                 icache = l1i_cache,
                                 dcache = l1d_cache,
+                                clk_domain=system.cpu[i].clk_domain,
                                 ruby_system = ruby_system)
 
         l1_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 configs/ruby/MOESI_hammer.py
--- a/configs/ruby/MOESI_hammer.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/configs/ruby/MOESI_hammer.py	Sat Aug 23 18:28:24 2014 +0200
@@ -105,11 +105,13 @@
                                       send_evictions = (
                                           options.cpu_type == "detailed"),
                                       transitions_per_cycle = options.ports,
+                                      clk_domain=system.cpu[i].clk_domain,
                                       ruby_system = ruby_system)
 
         cpu_seq = RubySequencer(version = i,
                                 icache = l1i_cache,
                                 dcache = l1d_cache,
+                                clk_domain=system.cpu[i].clk_domain,
                                 ruby_system = ruby_system)
 
         l1_cntrl.sequencer = cpu_seq
diff -r 79fde1c67ed8 tests/configs/rubytest-ruby.py
--- a/tests/configs/rubytest-ruby.py	Wed Aug 13 06:57:36 2014 -0400
+++ b/tests/configs/rubytest-ruby.py	Sat Aug 23 18:28:24 2014 +0200
@@ -78,7 +78,7 @@
 tester = RubyTester(check_flush = check_flush, checks_to_complete = 100,
                     wakeup_frequency = 10, num_cpus = options.num_cpus)
 
-system = System(tester = tester, physmem = SimpleMemory(null = True))
+system = System(cpu = tester, physmem = SimpleMemory(null = True))
 # Dummy voltage domain for all our clock domains
 system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
 system.clk_domain = SrcClockDomain(clock = '1GHz',