diff -r 992be57d8ca3 -r a094bfd1088e src/cpu/o3/commit.hh --- a/src/cpu/o3/commit.hh Thu Jun 12 14:51:12 2014 -0500 +++ b/src/cpu/o3/commit.hh Thu Jun 12 14:51:25 2014 -0500 @@ -218,6 +218,9 @@ /** Takes over from another CPU's thread. */ void takeOverFrom(); + /** Deschedules a thread from scheduling */ + void deactivateThread(ThreadID tid); + /** Ticks the commit stage, which tries to commit instructions. */ void tick(); diff -r 992be57d8ca3 -r a094bfd1088e src/cpu/o3/commit_impl.hh --- a/src/cpu/o3/commit_impl.hh Thu Jun 12 14:51:12 2014 -0500 +++ b/src/cpu/o3/commit_impl.hh Thu Jun 12 14:51:25 2014 -0500 @@ -463,6 +463,19 @@ template void +DefaultCommit::deactivateThread(ThreadID tid) +{ + list::iterator thread_it = std::find(priority_list.begin(), + priority_list.end(), tid); + + if (thread_it != priority_list.end()) { + priority_list.erase(thread_it); + } +} + + +template +void DefaultCommit::updateStatus() { // reset ROB changed variable diff -r 992be57d8ca3 -r a094bfd1088e src/cpu/o3/cpu.cc --- a/src/cpu/o3/cpu.cc Thu Jun 12 14:51:12 2014 -0500 +++ b/src/cpu/o3/cpu.cc Thu Jun 12 14:51:25 2014 -0500 @@ -728,6 +728,9 @@ tid); activeThreads.erase(thread_it); } + + fetch.deactivateThread(tid); + commit.deactivateThread(tid); } template diff -r 992be57d8ca3 -r a094bfd1088e src/cpu/o3/fetch.hh --- a/src/cpu/o3/fetch.hh Thu Jun 12 14:51:12 2014 -0500 +++ b/src/cpu/o3/fetch.hh Thu Jun 12 14:51:25 2014 -0500 @@ -255,6 +255,8 @@ /** Tells fetch to wake up from a quiesce instruction. */ void wakeFromQuiesce(); + /** For priority-based fetch policies, need to keep update priorityList */ + void deactivateThread(ThreadID tid); private: /** Reset this pipeline stage */ void resetStage(); diff -r 992be57d8ca3 -r a094bfd1088e src/cpu/o3/fetch_impl.hh --- a/src/cpu/o3/fetch_impl.hh Thu Jun 12 14:51:12 2014 -0500 +++ b/src/cpu/o3/fetch_impl.hh Thu Jun 12 14:51:25 2014 -0500 @@ -522,6 +522,28 @@ } template +void +DefaultFetch::deactivateThread(ThreadID tid) +{ + // Update priority list + list::iterator thread_it = std::find(priorityList.begin(), + priorityList.end(), tid); + + if (thread_it != priorityList.end()) { + priorityList.erase(thread_it); + } + + // Remove instructions from the fetch queue + auto inst_itr = fetchQueue.begin(); + while (inst_itr != fetchQueue.end()) { + if ((*inst_itr)->threadNumber == tid) + inst_itr = fetchQueue.erase(inst_itr); + else + ++inst_itr; + } +} + +template bool DefaultFetch::lookupAndUpdateNextPC( DynInstPtr &inst, TheISA::PCState &nextPC)