diff -r 37c56be05af0 -r 8cc28ba5f33d src/cpu/simple/timing.cc
--- a/src/cpu/simple/timing.cc	Tue Sep 14 12:31:37 2010 -0700
+++ b/src/cpu/simple/timing.cc	Mon Sep 27 17:19:18 2010 -0500
@@ -274,7 +274,7 @@
 {
     PacketPtr pkt;
     buildPacket(pkt, req, read);
-    pkt->dataDynamic<uint8_t>(data);
+    pkt->dataDynamicArray<uint8_t>(data);
     if (req->getFlags().isSet(Request::NO_ACCESS)) {
         assert(!dcache_pkt);
         pkt->makeResponse();
@@ -402,7 +402,7 @@
     PacketPtr pkt = new Packet(req, pkt1->cmd.responseCommand(),
                                Packet::Broadcast);
 
-    pkt->dataDynamic<uint8_t>(data);
+    pkt->dataDynamicArray<uint8_t>(data);
     pkt1->dataStatic<uint8_t>(data);
     pkt2->dataStatic<uint8_t>(data + req1->getSize());
 
@@ -602,7 +602,7 @@
     if (traceData) {
         traceData->setData(data);
     }
-    T *dataP = new T;
+    T *dataP = (T*) new uint8_t[sizeof(T)];
     *dataP = TheISA::htog(data);
 
     return writeTheseBytes((uint8_t *)dataP, sizeof(T), addr, flags, res);
@@ -674,7 +674,7 @@
         if (state->isPrefetch()) {
             state->setNoFault();
         }
-        delete state->data;
+        delete [] state->data;
         state->deleteReqs();
         translationFault(state->getFault());
     } else {
diff -r 37c56be05af0 -r 8cc28ba5f33d src/mem/packet.hh
--- a/src/mem/packet.hh	Tue Sep 14 12:31:37 2010 -0700
+++ b/src/mem/packet.hh	Mon Sep 27 17:19:18 2010 -0500
@@ -704,7 +704,8 @@
     void
     setData(uint8_t *p)
     {
-        std::memcpy(getPtr<uint8_t>(), p, getSize());
+        if (p != getPtr<uint8_t>())
+            std::memcpy(getPtr<uint8_t>(), p, getSize());
     }
 
     /**