diff -r 2b7e7dd6fe0b -r fcc80966a873 src/mem/cache/base.hh --- a/src/mem/cache/base.hh Tue Mar 17 19:08:03 2015 +0000 +++ b/src/mem/cache/base.hh Tue Mar 17 19:08:09 2015 +0000 @@ -210,9 +210,7 @@ * * allocateBufferInternal() function is called in: * - MSHR allocateWriteBuffer (unchached write forwarded to WriteBuffer); - * - MSHR allocateMissBuffer (cacheable miss in MSHR queue); - * - MSHR allocateUncachedReadBuffer (unchached read allocated in MSHR - * queue) + * - MSHR allocateMissBuffer (miss in MSHR queue); */ MSHR *allocateBufferInternal(MSHRQueue *mq, Addr addr, int size, PacketPtr pkt, Tick time, bool requestBus) @@ -501,7 +499,6 @@ MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool requestBus) { - assert(!pkt->req->isUncacheable()); return allocateBufferInternal(&mshrQueue, blockAlign(pkt->getAddr()), blkSize, pkt, time, requestBus); @@ -515,15 +512,6 @@ pkt, time, requestBus); } - MSHR *allocateUncachedReadBuffer(PacketPtr pkt, Tick time, bool requestBus) - { - assert(pkt->req->isUncacheable()); - assert(pkt->isRead()); - return allocateBufferInternal(&mshrQueue, - blockAlign(pkt->getAddr()), blkSize, - pkt, time, requestBus); - } - /** * Returns true if the cache is blocked for accesses. */ diff -r 2b7e7dd6fe0b -r fcc80966a873 src/mem/cache/cache_impl.hh --- a/src/mem/cache/cache_impl.hh Tue Mar 17 19:08:03 2015 +0000 +++ b/src/mem/cache/cache_impl.hh Tue Mar 17 19:08:09 2015 +0000 @@ -555,7 +555,7 @@ pkt->headerDelay; // Reset the timing of the packet. pkt->headerDelay = pkt->payloadDelay = 0; - allocateUncachedReadBuffer(pkt, allocate_rd_buffer_time, true); + allocateMissBuffer(pkt, allocate_rd_buffer_time, true); } assert(pkt->needsResponse()); // else we should delete it here?? return true;