diff -r 2528c94043ac -r d3ead01d8747 src/mem/ruby/slicc_interface/AbstractController.hh --- a/src/mem/ruby/slicc_interface/AbstractController.hh Thu Mar 19 14:51:39 2015 -0500 +++ b/src/mem/ruby/slicc_interface/AbstractController.hh Sat Mar 21 14:09:40 2015 -0500 @@ -205,6 +205,9 @@ // memory controller. MessageBuffer *m_responseFromMemory_ptr; + // Needed so we know if we are warming up + RubySystem *m_rubySystem; + // State that is stored in packets sent to the memory controller. struct SenderState : public Packet::SenderState { diff -r 2528c94043ac -r d3ead01d8747 src/mem/ruby/slicc_interface/AbstractController.cc --- a/src/mem/ruby/slicc_interface/AbstractController.cc Thu Mar 19 14:51:39 2015 -0500 +++ b/src/mem/ruby/slicc_interface/AbstractController.cc Sat Mar 21 14:09:40 2015 -0500 @@ -40,7 +40,8 @@ m_transitions_per_cycle(p->transitions_per_cycle), m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency), memoryPort(csprintf("%s.memory", name()), this, ""), - m_responseFromMemory_ptr(new MessageBuffer()) + m_responseFromMemory_ptr(new MessageBuffer()), + m_rubySystem(p->ruby_system) { // Set the sender pointer of the response message buffer from the // memory controller. @@ -217,6 +218,13 @@ SenderState *s = new SenderState(id); pkt->pushSenderState(s); + // Use functional rather than timing accesses during warmup + if (m_rubySystem->m_warmup_enabled) { + memoryPort.sendFunctional(pkt); + recvTimingResp(pkt); + return; + } + memoryPort.schedTimingReq(pkt, clockEdge(latency)); } @@ -237,6 +245,13 @@ SenderState *s = new SenderState(id); pkt->pushSenderState(s); + // Use functional rather than timing accesses during warmup + if (m_rubySystem->m_warmup_enabled) { + memoryPort.sendFunctional(pkt); + recvTimingResp(pkt); + return; + } + // Create a block and copy data from the block. memoryPort.schedTimingReq(pkt, clockEdge(latency)); }