diff -r ff2215a13313 -r a4356848d9f1 configs/ruby/MI_example.py
--- a/configs/ruby/MI_example.py	Mon Aug 17 09:15:52 2015 +0100
+++ b/configs/ruby/MI_example.py	Mon Aug 17 09:16:00 2015 +0100
@@ -37,7 +37,7 @@
 #
 # Declare caches used by the protocol
 #
-class Cache(RubyCache): pass
+class L1Cache(RubyCache): pass
 
 def define_options(parser):
     return
@@ -70,9 +70,9 @@
         # Only one cache exists for this protocol, so by default use the L1D
         # config parameters.
         #
-        cache = Cache(size = options.l1d_size,
-                      assoc = options.l1d_assoc,
-                      start_index_bit = block_size_bits)
+        cache = L1Cache(size = options.l1d_size,
+                        assoc = options.l1d_assoc,
+                        start_index_bit = block_size_bits)
 
         #
         # Only one unified L1 cache exists.  Can cache instructions and data.
diff -r ff2215a13313 -r a4356848d9f1 configs/ruby/Network_test.py
--- a/configs/ruby/Network_test.py	Mon Aug 17 09:15:52 2015 +0100
+++ b/configs/ruby/Network_test.py	Mon Aug 17 09:16:00 2015 +0100
@@ -36,7 +36,7 @@
 #
 # Declare caches used by the protocol
 #
-class Cache(RubyCache): pass
+class L1Cache(RubyCache): pass
 
 def define_options(parser):
     return
@@ -72,8 +72,8 @@
         # Only one cache exists for this protocol, so by default use the L1D
         # config parameters.
         #
-        cache = Cache(size = options.l1d_size,
-                      assoc = options.l1d_assoc)
+        cache = L1Cache(size = options.l1d_size,
+                        assoc = options.l1d_assoc)
 
         #
         # Only one unified L1 cache exists.  Can cache instructions and data.
diff -r ff2215a13313 -r a4356848d9f1 src/mem/ruby/structures/Cache.py
--- a/src/mem/ruby/structures/Cache.py	Mon Aug 17 09:15:52 2015 +0100
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,51 +0,0 @@
-# Copyright (c) 2009 Advanced Micro Devices, Inc.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Steve Reinhardt
-#          Brad Beckmann
-
-from m5.params import *
-from m5.proxy import *
-from PseudoLRUReplacementPolicy import PseudoLRUReplacementPolicy
-from m5.SimObject import SimObject
-
-class RubyCache(SimObject):
-    type = 'RubyCache'
-    cxx_class = 'CacheMemory'
-    cxx_header = "mem/ruby/structures/CacheMemory.hh"
-    size = Param.MemorySize("capacity in bytes");
-    assoc = Param.Int("");
-    replacement_policy = Param.ReplacementPolicy(PseudoLRUReplacementPolicy(),
-                         "")
-    start_index_bit = Param.Int(6, "index start, default 6 for 64-byte line");
-    is_icache = Param.Bool(False, "is instruction only cache");
-
-    dataArrayBanks = Param.Int(1, "Number of banks for the data array")
-    tagArrayBanks = Param.Int(1, "Number of banks for the tag array")
-    dataAccessLatency = Param.Cycles(1, "cycles for a data array access")
-    tagAccessLatency = Param.Cycles(1, "cycles for a tag array access")
-    resourceStalls = Param.Bool(False, "stall if there is a resource failure")
-    ruby_system = Param.RubySystem(Parent.any, "")
diff -r ff2215a13313 -r a4356848d9f1 src/mem/ruby/structures/RubyCache.py
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/mem/ruby/structures/RubyCache.py	Mon Aug 17 09:16:00 2015 +0100
@@ -0,0 +1,51 @@
+# Copyright (c) 2009 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+#          Brad Beckmann
+
+from m5.params import *
+from m5.proxy import *
+from PseudoLRUReplacementPolicy import PseudoLRUReplacementPolicy
+from m5.SimObject import SimObject
+
+class RubyCache(SimObject):
+    type = 'RubyCache'
+    cxx_class = 'CacheMemory'
+    cxx_header = "mem/ruby/structures/CacheMemory.hh"
+    size = Param.MemorySize("capacity in bytes");
+    assoc = Param.Int("");
+    replacement_policy = Param.ReplacementPolicy(PseudoLRUReplacementPolicy(),
+                         "")
+    start_index_bit = Param.Int(6, "index start, default 6 for 64-byte line");
+    is_icache = Param.Bool(False, "is instruction only cache");
+
+    dataArrayBanks = Param.Int(1, "Number of banks for the data array")
+    tagArrayBanks = Param.Int(1, "Number of banks for the tag array")
+    dataAccessLatency = Param.Cycles(1, "cycles for a data array access")
+    tagAccessLatency = Param.Cycles(1, "cycles for a tag array access")
+    resourceStalls = Param.Bool(False, "stall if there is a resource failure")
+    ruby_system = Param.RubySystem(Parent.any, "")
diff -r ff2215a13313 -r a4356848d9f1 src/mem/ruby/structures/SConscript
--- a/src/mem/ruby/structures/SConscript	Mon Aug 17 09:15:52 2015 +0100
+++ b/src/mem/ruby/structures/SConscript	Mon Aug 17 09:16:00 2015 +0100
@@ -33,7 +33,7 @@
 if env['PROTOCOL'] == 'None':
     Return()
 
-SimObject('Cache.py')
+SimObject('RubyCache.py')
 SimObject('DirectoryMemory.py')
 SimObject('LRUReplacementPolicy.py')
 SimObject('PseudoLRUReplacementPolicy.py')