# Node ID 80f4a6c2d290fef6d9cabcf55e150e9540b14a0b
# Parent  89c03e4eb4b05a9d340790cfa1e67cc2d1b97d41
diff --git a/src/mem/slicc/ast/CheckNextCycleAST.py b/src/mem/slicc/ast/CheckNextCycleAST.py
--- a/src/mem/slicc/ast/CheckNextCycleAST.py
+++ b/src/mem/slicc/ast/CheckNextCycleAST.py
@@ -29,12 +29,16 @@
 from slicc.ast.StatementAST import StatementAST
 
 class CheckNextCycleAST(StatementAST):
-    def __init__(self, slicc):
+    def __init__(self, slicc, buf):
         super(CheckNextCycleAST, self).__init__(slicc)
 
+        assert buf is not None
+
+        self.buf = buf
+
     def __repr__(self):
-        return "[CheckNextCycleAST]"
+        return "[CheckNextCycleAST %s]" % (self.buf)
 
     def generate(self, code, return_type):
-        code("scheduleEvent(Cycles(1));")
+        code("m_${{self.buf}}_ptr->scheduleWakeup(clockEdge(Cycles(1)));")
         return "CheckNextCycle"
diff --git a/src/mem/slicc/ast/FuncCallExprAST.py b/src/mem/slicc/ast/FuncCallExprAST.py
--- a/src/mem/slicc/ast/FuncCallExprAST.py
+++ b/src/mem/slicc/ast/FuncCallExprAST.py
@@ -141,7 +141,6 @@
         schedule_wakeup = true;
 
         // Cannot do anything with this transition, go check next doable transition (mostly likely of next port)
-        continue;
     }
 }
 ''')
@@ -166,7 +165,7 @@
         elif self.proc_name == "unset_tbe":
             code("unset_tbe(m_tbe_ptr);");
         elif self.proc_name == "stallPort":
-            code("scheduleEvent(Cycles(1));")
+            code("m_${{self.exprs[0]._var}}_ptr->scheduleWakeup(clockEdge(Cycles(1)));")
 
         else:
             # Normal function
diff --git a/src/mem/slicc/ast/InPortDeclAST.py b/src/mem/slicc/ast/InPortDeclAST.py
--- a/src/mem/slicc/ast/InPortDeclAST.py
+++ b/src/mem/slicc/ast/InPortDeclAST.py
@@ -95,8 +95,8 @@
 
         # Add the stallPort method - this hacks reschedules the controller
         # for stalled messages that don't trigger events
-        func = Func(self.symtab, "stallPort", "stallPort", self.location,
-                    void_type, [], [], "", pairs)
+        func = Func(self.symtab, "stallPort_MessageBuffer", "stallPort", self.location,
+                    void_type, ["MessageBuffer"], ["buffer"], "", pairs)
         symtab.newSymbol(func)
 
         param_types = []
diff --git a/src/mem/slicc/parser.py b/src/mem/slicc/parser.py
--- a/src/mem/slicc/parser.py
+++ b/src/mem/slicc/parser.py
@@ -599,8 +599,8 @@
         p[0] = ast.CheckAllocateStatementAST(self, p[3])
 
     def p_statement__check_next_cycle(self, p):
-        "statement : CHECK_NEXT_CYCLE '(' ')' SEMI"
-        p[0] = ast.CheckNextCycleAST(self)
+        "statement : CHECK_NEXT_CYCLE '(' ident ')' SEMI"
+        p[0] = ast.CheckNextCycleAST(self, p[3])
 
     def p_statement__check_stop(self, p):
         "statement : CHECK_STOP_SLOTS '(' var ',' STRING ',' STRING ')' SEMI"
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -318,7 +318,7 @@
 
         code.indent()
         port_to_buf_map, in_msg_bufs, msg_bufs = self.getBufferMaps(ident)
-        for msg_buf in msg_bufs:
+        for msg_buf in list(set(msg_bufs)):
             code('''
 void Wakeup_${{msg_buf}}(Tick curTime);
 class ${{msg_buf}}_WakeupEvent : public Event
@@ -1094,7 +1094,7 @@
             if len(in_ports) > 1:
                 # only produce checks when a buffer is shared by multiple ports
                 code('''
-        if (${{msg_buf}}->isReady(clockEdge()) && rejected > 0)
+        if (${{msg_buf}}_ptr->isReady(clockEdge()) && rejected > 0)
         {
             // no port claimed the message on the top of this buffer
             panic("Runtime Error at Ruby Time: %d. "