# Node ID 1337bad45ca5a5eeceb9330c3c91744c46c27d15
# Parent  34f9a235f2f42bc127a81e04a57b59eca3af5e39
diff --git a/src/mem/protocol/RubySlicc_Util.sm b/src/mem/protocol/RubySlicc_Util.sm
--- a/src/mem/protocol/RubySlicc_Util.sm
+++ b/src/mem/protocol/RubySlicc_Util.sm
@@ -36,6 +36,7 @@
 NodeID intToID(int nodenum);
 int IDToInt(NodeID id);
 int addressToInt(Addr addr);
+Addr intToAddress(int addr);
 void procProfileCoherenceRequest(NodeID node, bool needCLB);
 void dirProfileCoherenceRequest(NodeID node, bool needCLB);
 int max_tokens();
@@ -43,6 +44,9 @@
 Addr makeLineAddress(Addr addr);
 int getOffset(Addr addr);
 int mod(int val, int mod);
+Addr bitSelect(Addr addr, int small, int big);
+Addr maskLowOrderBits(Addr addr, int number);
+Addr makeNextStrideAddress(Addr addr, int stride);
 structure(BoolVec, external="yes") {
 }
 int countBoolVec(BoolVec bVec);
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
--- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
@@ -67,6 +67,13 @@
     return addr;
 }
 
+inline Addr
+intToAddress(int addr)
+{
+    assert(!(addr & 0xffffffff00000000));
+    return addr;
+}
+
 inline int
 mod(int val, int mod)
 {
diff --git a/src/mem/slicc/symbols/Transition.py b/src/mem/slicc/symbols/Transition.py
--- a/src/mem/slicc/symbols/Transition.py
+++ b/src/mem/slicc/symbols/Transition.py
@@ -40,7 +40,7 @@
             # check to make sure there is a getNextState function declared
             found = False
             for func in machine.functions:
-                if func.c_ident == 'getNextState_Address':
+                if func.c_ident == 'getNextState_Addr':
                     found = True
                     break
             if found == False: