diff -r 2d1d51615e0e src/arch/x86/pagetable_walker.cc
--- a/src/arch/x86/pagetable_walker.cc	Tue Nov 03 12:17:58 2015 -0600
+++ b/src/arch/x86/pagetable_walker.cc	Wed Nov 04 14:43:21 2015 +0000
@@ -615,21 +615,21 @@ Walker::WalkerState::recvPacket(PacketPt
         }
         sendPackets();
     } else {
         sendPackets();
     }
     if (inflight == 0 && read == NULL && writes.size() == 0) {
         state = Ready;
         nextState = Waiting;
         if (timingFault == NoFault) {
             /*
-             * Finish the translation. Now that we now the right entry is
+             * Finish the translation. Now that we know the right entry is
              * in the TLB, this should work with no memory accesses.
              * There could be new faults unrelated to the table walk like
              * permissions violations, so we'll need the return value as
              * well.
              */
             bool delayedResponse;
             Fault fault = walker->tlb->translate(req, tc, NULL, mode,
                                                  delayedResponse, true);
             assert(!delayedResponse);
             // Let the CPU continue.