diff --git a/src/mem/ruby/system/VIPERCoalescer.cc b/src/mem/ruby/system/VIPERCoalescer.cc
--- a/src/mem/ruby/system/VIPERCoalescer.cc
+++ b/src/mem/ruby/system/VIPERCoalescer.cc
@@ -53,7 +53,6 @@
 #include "mem/ruby/slicc_interface/RubyRequest.hh"
 #include "mem/ruby/structures/CacheMemory.hh"
 #include "mem/ruby/system/GPUCoalescer.hh"
-#include "mem/ruby/system/RubySystem.hh"
 #include "params/VIPERCoalescer.hh"
 
 using namespace std;
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -1058,7 +1058,6 @@
 
         code('''
 #include "mem/protocol/Types.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 ''')
 
@@ -1166,7 +1165,6 @@
 #include "mem/protocol/${ident}_Event.hh"
 #include "mem/protocol/${ident}_State.hh"
 #include "mem/protocol/Types.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 #define HASH_FUN(state, event)  ((int(state)*${ident}_Event_NUM)+int(event))
 
diff --git a/src/mem/slicc/symbols/Type.py b/src/mem/slicc/symbols/Type.py
--- a/src/mem/slicc/symbols/Type.py
+++ b/src/mem/slicc/symbols/Type.py
@@ -436,7 +436,6 @@
 #include <memory>
 
 #include "mem/protocol/${{self.c_ident}}.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 ''')
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -538,8 +538,7 @@
     // Allocate the invalidate request and packet on the stack, as it is
     // assumed they will not be modified or deleted by receivers.
     // TODO: should this really be using funcMasterId?
-    Request request(address, RubySystem::getBlockSizeBytes(), 0,
-                    Request::funcMasterId);
+    Request request(address, m_block_size_bytes, 0, Request::funcMasterId);
     // Use a single packet to signal all snooping ports of the invalidation.
     // This assumes that snooping ports do NOT modify the packet/request
     Packet pkt(&request, MemCmd::InvalidateReq);
diff --git a/src/mem/ruby/system/RubySystem.hh b/src/mem/ruby/system/RubySystem.hh
--- a/src/mem/ruby/system/RubySystem.hh
+++ b/src/mem/ruby/system/RubySystem.hh
@@ -72,15 +72,13 @@
 
     // config accessors
     static int getRandomization() { return m_randomization; }
-    static uint32_t getBlockSizeBytes() { return m_block_size_bytes; }
-    static uint32_t getBlockSizeBits() { return m_block_size_bits; }
     static uint32_t getMemorySizeBits() { return m_memory_size_bits; }
     static bool getWarmupEnabled() { return m_warmup_enabled; }
     static bool getCooldownEnabled() { return m_cooldown_enabled; }
 
     SimpleMemory *getPhysMem() { return m_phys_mem; }
     Cycles getStartCycle() { return m_start_cycle; }
-    bool getAccessBackingStore() { return m_access_backing_store; }
+    bool getAccessBackingStore() const { return m_access_backing_store; }
 
     // Public Methods
     Profiler*
@@ -131,8 +129,8 @@
   private:
     // configuration parameters
     static bool m_randomization;
-    static uint32_t m_block_size_bytes;
-    static uint32_t m_block_size_bits;
+    const uint32_t m_block_size_bytes;
+    const uint32_t m_block_size_bits;
     static uint32_t m_memory_size_bits;
 
     static bool m_warmup_enabled;
@@ -147,7 +145,7 @@
 
   public:
     Profiler* m_profiler;
-    CacheRecorder* m_cache_recorder;
+    CacheRecorder *m_cache_recorder;
     std::vector<std::map<uint32_t, AbstractController *> > m_abstract_controls;
 };
 
diff --git a/src/mem/ruby/system/RubySystem.cc b/src/mem/ruby/system/RubySystem.cc
--- a/src/mem/ruby/system/RubySystem.cc
+++ b/src/mem/ruby/system/RubySystem.cc
@@ -47,8 +47,6 @@
 using namespace std;
 
 bool RubySystem::m_randomization;
-uint32_t RubySystem::m_block_size_bytes;
-uint32_t RubySystem::m_block_size_bits;
 uint32_t RubySystem::m_memory_size_bits;
 bool RubySystem::m_warmup_enabled = false;
 // To look forward to allowing multiple RubySystem instances, track the number
@@ -57,14 +55,14 @@
 bool RubySystem::m_cooldown_enabled = false;
 
 RubySystem::RubySystem(const Params *p)
-    : ClockedObject(p), m_access_backing_store(p->access_backing_store),
+    : ClockedObject(p), m_block_size_bytes(p->block_size_bytes),
+      m_block_size_bits(floorLog2(m_block_size_bytes)),
+      m_access_backing_store(p->access_backing_store),
       m_cache_recorder(NULL)
 {
     m_randomization = p->randomization;
 
-    m_block_size_bytes = p->block_size_bytes;
     assert(isPowerOf2(m_block_size_bytes));
-    m_block_size_bits = floorLog2(m_block_size_bytes);
     m_memory_size_bits = p->memory_size_bits;
 
     // Resize to the size of different machine types
@@ -138,7 +136,7 @@
 
     // Make the trace so we know what to write back.
     DPRINTF(RubyCacheTrace, "Recording Cache Trace\n");
-    makeCacheRecorder(NULL, 0, getBlockSizeBytes());
+    makeCacheRecorder(NULL, 0, m_block_size_bytes);
     for (int cntrl = 0; cntrl < m_abs_cntrl_vec.size(); cntrl++) {
         m_abs_cntrl_vec[cntrl]->recordCacheTrace(cntrl, m_cache_recorder);
     }
@@ -238,7 +236,7 @@
     // Store the cache-block size, so we are able to restore on systems with a
     // different cache-block size. CacheRecorder depends on the correct
     // cache-block size upon unserializing.
-    uint64_t block_size_bytes = getBlockSizeBytes();
+    uint64_t block_size_bytes = m_block_size_bytes;
     SERIALIZE_SCALAR(block_size_bytes);
 
     // Check that there's a valid trace to use.  If not, then memory won't be
@@ -309,9 +307,17 @@
     // This value should be set to the checkpoint-system's block-size.
     // Optional, as checkpoints without it can be run if the
     // checkpoint-system's block-size == current block-size.
-    uint64_t block_size_bytes = getBlockSizeBytes();
+    uint64_t block_size_bytes = m_block_size_bytes;
     UNSERIALIZE_OPT_SCALAR(block_size_bytes);
 
+    if (m_block_size_bytes > block_size_bytes) {
+        // Block sizes larger than when the trace was recorded are not
+        // supported, as we cannot reliably turn accesses to smaller blocks
+        // into larger ones.
+        panic("Recorded cache block size (%d) < current block size (%d) !!",
+              block_size_bytes, m_block_size_bytes);
+    }
+
     string cache_trace_file;
     uint64_t cache_trace_size = 0;
 
@@ -383,7 +389,8 @@
 RubySystem::RubyEvent::process()
 {
     if (RubySystem::getWarmupEnabled()) {
-        m_ruby_system->m_cache_recorder->enqueueNextFetchRequest();
+        m_ruby_system->m_cache_recorder->enqueueNextFetchRequest(
+                m_ruby_system->m_block_size_bytes);
     } else if (RubySystem::getCooldownEnabled()) {
         m_ruby_system->m_cache_recorder->enqueueNextFlushRequest();
     }
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -52,7 +52,8 @@
 }
 
 Sequencer::Sequencer(const Params *p)
-    : RubyPort(p), m_IncompleteTimes(MachineType_NUM), deadlockCheckEvent(this)
+    : RubyPort(p),
+      m_IncompleteTimes(MachineType_NUM), deadlockCheckEvent(this)
 {
     m_outstanding_count = 0;
 
@@ -491,7 +492,7 @@
         assert(pkt->req);
         delete pkt->req;
         delete pkt;
-        rs->m_cache_recorder->enqueueNextFetchRequest();
+        rs->m_cache_recorder->enqueueNextFetchRequest(m_block_size_bytes);
     } else if (RubySystem::getCooldownEnabled()) {
         delete pkt;
         rs->m_cache_recorder->enqueueNextFlushRequest();
diff --git a/src/mem/ruby/system/CacheRecorder.cc b/src/mem/ruby/system/CacheRecorder.cc
--- a/src/mem/ruby/system/CacheRecorder.cc
+++ b/src/mem/ruby/system/CacheRecorder.cc
@@ -29,7 +29,6 @@
 
 #include "debug/RubyCacheTrace.hh"
 #include "mem/ruby/system/CacheRecorder.hh"
-#include "mem/ruby/system/RubySystem.hh"
 #include "mem/ruby/system/Sequencer.hh"
 
 using namespace std;
@@ -58,15 +57,6 @@
       m_seq_map(seq_map),  m_bytes_read(0), m_records_read(0),
       m_records_flushed(0), m_block_size_bytes(block_size_bytes)
 {
-    if (m_uncompressed_trace != NULL) {
-        if (m_block_size_bytes < RubySystem::getBlockSizeBytes()) {
-            // Block sizes larger than when the trace was recorded are not
-            // supported, as we cannot reliably turn accesses to smaller blocks
-            // into larger ones.
-            panic("Recorded cache block size (%d) < current block size (%d) !!",
-                    m_block_size_bytes, RubySystem::getBlockSizeBytes());
-        }
-    }
 }
 
 CacheRecorder::~CacheRecorder()
@@ -101,32 +91,33 @@
 }
 
 void
-CacheRecorder::enqueueNextFetchRequest()
+CacheRecorder::enqueueNextFetchRequest(uint32_t current_block_size_bytes)
 {
     if (m_bytes_read < m_uncompressed_trace_size) {
-        TraceRecord* traceRecord = (TraceRecord*) (m_uncompressed_trace +
-                                                                m_bytes_read);
+        TraceRecord* traceRecord =
+            (TraceRecord*) (m_uncompressed_trace + m_bytes_read);
+        uint32_t old_block_size_bytes = m_block_size_bytes;
 
         DPRINTF(RubyCacheTrace, "Issuing %s\n", *traceRecord);
 
-        for (int rec_bytes_read = 0; rec_bytes_read < m_block_size_bytes;
-                rec_bytes_read += RubySystem::getBlockSizeBytes()) {
+        for (int rec_bytes_read = 0; rec_bytes_read < old_block_size_bytes;
+                rec_bytes_read += current_block_size_bytes) {
             Request* req = nullptr;
             MemCmd::Command requestType;
 
             if (traceRecord->m_type == RubyRequestType_LD) {
                 requestType = MemCmd::ReadReq;
                 req = new Request(traceRecord->m_data_address + rec_bytes_read,
-                    RubySystem::getBlockSizeBytes(), 0, Request::funcMasterId);
+                        current_block_size_bytes, 0, Request::funcMasterId);
             }   else if (traceRecord->m_type == RubyRequestType_IFETCH) {
                 requestType = MemCmd::ReadReq;
                 req = new Request(traceRecord->m_data_address + rec_bytes_read,
-                        RubySystem::getBlockSizeBytes(),
+                        current_block_size_bytes,
                         Request::INST_FETCH, Request::funcMasterId);
             }   else {
                 requestType = MemCmd::WriteReq;
                 req = new Request(traceRecord->m_data_address + rec_bytes_read,
-                    RubySystem::getBlockSizeBytes(), 0, Request::funcMasterId);
+                        current_block_size_bytes, 0, Request::funcMasterId);
             }
 
             Packet *pkt = new Packet(req, requestType);
@@ -137,7 +128,7 @@
             m_sequencer_ptr->makeRequest(pkt);
         }
 
-        m_bytes_read += (sizeof(TraceRecord) + m_block_size_bytes);
+        m_bytes_read += (sizeof(TraceRecord) + old_block_size_bytes);
         m_records_read++;
     } else {
         DPRINTF(RubyCacheTrace, "Fetched all %d records\n", m_records_read);
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -33,7 +33,6 @@
 #include "mem/protocol/SequencerMsg.hh"
 #include "mem/protocol/SequencerRequestType.hh"
 #include "mem/ruby/system/DMASequencer.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 DMASequencer::DMASequencer(const Params *p)
     : RubyPort(p)
@@ -45,7 +44,7 @@
 {
     RubyPort::init();
     m_is_busy = false;
-    m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits());
+    m_data_block_mask = ~ (~0 << m_block_size_bits);
 
     for (const auto &s_port : slave_ports)
         s_port->sendRangeChange();
@@ -82,8 +81,8 @@
     msg->getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD;
     int offset = paddr & m_data_block_mask;
 
-    msg->getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ?
-        len : RubySystem::getBlockSizeBytes() - offset;
+    msg->getLen() = (offset + len) <= m_block_size_bytes ?
+        len : m_block_size_bytes - offset;
 
     if (write && (data != NULL)) {
         if (active_request.data != NULL) {
@@ -128,9 +127,9 @@
 
     msg->getLen() =
         (active_request.len -
-         active_request.bytes_completed < RubySystem::getBlockSizeBytes() ?
+         active_request.bytes_completed < m_block_size_bytes ?
          active_request.len - active_request.bytes_completed :
-         RubySystem::getBlockSizeBytes());
+            m_block_size_bytes);
 
     if (active_request.write) {
         msg->getDataBlk().
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -911,8 +911,7 @@
     // and partial reads of those writes
     DataBlock dataBlock(m_block_size_bytes);
     dataBlock.clear();
-    uint32_t blockSize = RubySystem::getBlockSizeBytes();
-    std::vector<bool> accessMask(blockSize,false);
+    std::vector<bool> accessMask(m_block_size_bytes, false);
     std::vector< std::pair<int,AtomicOpFunctor*> > atomicOps;
     uint32_t tableSize = reqCoalescer[line_addr].size();
     for (int i = 0; i < tableSize; i++) {
diff --git a/src/mem/ruby/structures/RubyMemoryControl.cc b/src/mem/ruby/structures/RubyMemoryControl.cc
--- a/src/mem/ruby/structures/RubyMemoryControl.cc
+++ b/src/mem/ruby/structures/RubyMemoryControl.cc
@@ -114,7 +114,6 @@
 #include "mem/ruby/slicc_interface/Message.hh"
 #include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
 #include "mem/ruby/structures/RubyMemoryControl.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
diff --git a/src/mem/ruby/structures/TimerTable.cc b/src/mem/ruby/structures/TimerTable.cc
--- a/src/mem/ruby/structures/TimerTable.cc
+++ b/src/mem/ruby/structures/TimerTable.cc
@@ -28,8 +28,6 @@
 
 #include "mem/ruby/structures/TimerTable.hh"
 
-#include "mem/ruby/system/RubySystem.hh"
-
 TimerTable::TimerTable()
     : m_next_time(0)
 {
diff --git a/src/mem/ruby/structures/WireBuffer.cc b/src/mem/ruby/structures/WireBuffer.cc
--- a/src/mem/ruby/structures/WireBuffer.cc
+++ b/src/mem/ruby/structures/WireBuffer.cc
@@ -35,7 +35,6 @@
 #include "base/cprintf.hh"
 #include "base/stl_helpers.hh"
 #include "mem/ruby/structures/WireBuffer.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
diff --git a/src/mem/ruby/system/CacheRecorder.hh b/src/mem/ruby/system/CacheRecorder.hh
--- a/src/mem/ruby/system/CacheRecorder.hh
+++ b/src/mem/ruby/system/CacheRecorder.hh
@@ -95,7 +95,7 @@
      * fetch request is issued only after the previous one has completed.
      * It should be possible to use this with any protocol.
      */
-    void enqueueNextFetchRequest();
+    void enqueueNextFetchRequest(uint32_t current_block_size_bytes);
 
   private:
     // Private copy constructor and assignment operator
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
--- a/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.cc
@@ -30,8 +30,6 @@
 
 #include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
 
-#include "mem/ruby/system/RubySystem.hh"
-
 OutVcState_d::OutVcState_d(int id, GarnetNetwork_d *network_ptr)
     : m_time(0)
 {
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -222,11 +222,9 @@
 AbstractController::queueMemoryRead(const MachineID &id, Addr addr,
                                     Cycles latency)
 {
-    RequestPtr req = new Request(addr, RubySystem::getBlockSizeBytes(), 0,
-                                 m_masterId);
-
+    RequestPtr req = new Request(addr, getBlockSizeBytes(), 0, m_masterId);
     PacketPtr pkt = Packet::createRead(req);
-    uint8_t *newData = new uint8_t[RubySystem::getBlockSizeBytes()];
+    uint8_t *newData = new uint8_t[getBlockSizeBytes()];
     pkt->dataDynamic(newData);
 
     SenderState *s = new SenderState(id);
@@ -246,14 +244,12 @@
 AbstractController::queueMemoryWrite(const MachineID &id, Addr addr,
                                      Cycles latency, const DataBlock &block)
 {
-    RequestPtr req = new Request(addr, RubySystem::getBlockSizeBytes(), 0,
-                                 m_masterId);
-
+    RequestPtr req = new Request(addr, getBlockSizeBytes(), 0, m_masterId);
     PacketPtr pkt = Packet::createWrite(req);
-    uint8_t *newData = new uint8_t[RubySystem::getBlockSizeBytes()];
+    uint8_t *newData = new uint8_t[getBlockSizeBytes()];
     pkt->dataDynamic(newData);
-    memcpy(newData, block.getData(0, RubySystem::getBlockSizeBytes()),
-           RubySystem::getBlockSizeBytes());
+    memcpy(newData, block.getData(0, getBlockSizeBytes()),
+           getBlockSizeBytes());
 
     SenderState *s = new SenderState(id);
     pkt->pushSenderState(s);
@@ -274,8 +270,7 @@
                                             Cycles latency,
                                             const DataBlock &block, int size)
 {
-    RequestPtr req = new Request(addr, RubySystem::getBlockSizeBytes(), 0,
-                                 m_masterId);
+    RequestPtr req = new Request(addr, getBlockSizeBytes(), 0, m_masterId);
 
     PacketPtr pkt = Packet::createWrite(req);
     uint8_t *newData = new uint8_t[size];
@@ -332,7 +327,7 @@
 
         // Copy data from the packet
         (*msg).m_DataBlk.setData(pkt->getPtr<uint8_t>(), 0,
-                                 RubySystem::getBlockSizeBytes());
+                                 getBlockSizeBytes());
     } else if (pkt->isWrite()) {
         (*msg).m_Type = MemoryRequestType_MEMORY_WB;
         (*msg).m_MessageSize = MessageSizeType_Writeback_Control;
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -184,7 +184,6 @@
     int m_cache_assoc;
     int m_start_index_bit;
     bool m_resource_stalls;
-    int m_block_size;
 
     //! Size of the cache blocks
     const uint32_t m_block_size_bytes;
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -69,16 +69,12 @@
     m_start_index_bit = p->start_index_bit;
     m_is_instruction_only_cache = p->is_icache;
     m_resource_stalls = p->resourceStalls;
-    m_block_size = p->block_size;  // may be 0 at this point. Updated in init()
 }
 
 void
 CacheMemory::init()
 {
-    if (m_block_size == 0) {
-        m_block_size = RubySystem::getBlockSizeBytes();
-    }
-    m_cache_num_sets = (m_cache_size / m_cache_assoc) / m_block_size;
+    m_cache_num_sets = (m_cache_size / m_cache_assoc) / m_block_size_bytes;
     assert(m_cache_num_sets > 1);
     m_cache_num_set_bits = floorLog2(m_cache_num_sets);
     assert(m_cache_num_set_bits > 0);
diff --git a/src/mem/ruby/structures/DirectoryMemory.cc b/src/mem/ruby/structures/DirectoryMemory.cc
--- a/src/mem/ruby/structures/DirectoryMemory.cc
+++ b/src/mem/ruby/structures/DirectoryMemory.cc
@@ -53,7 +53,7 @@
 void
 DirectoryMemory::init()
 {
-    m_num_entries = m_size_bytes / RubySystem::getBlockSizeBytes();
+    m_num_entries = m_size_bytes / m_block_size_bytes;
     m_entries = new AbstractEntry*[m_num_entries];
     for (int i = 0; i < m_num_entries; i++)
         m_entries[i] = NULL;
@@ -108,7 +108,7 @@
         ret = address;
     }
 
-    return ret >> (RubySystem::getBlockSizeBits());
+    return (ret >> m_block_size_bits);
 }
 
 AbstractEntry*
diff --git a/src/mem/ruby/structures/Prefetcher.hh b/src/mem/ruby/structures/Prefetcher.hh
--- a/src/mem/ruby/structures/Prefetcher.hh
+++ b/src/mem/ruby/structures/Prefetcher.hh
@@ -38,7 +38,6 @@
 #include "mem/ruby/network/MessageBuffer.hh"
 #include "mem/ruby/slicc_interface/AbstractController.hh"
 #include "mem/ruby/slicc_interface/RubyRequest.hh"
-#include "mem/ruby/system/RubySystem.hh"
 #include "params/Prefetcher.hh"
 #include "sim/sim_object.hh"
 #include "sim/system.hh"
@@ -50,12 +49,8 @@
     public:
         /// constructor
         PrefetchEntry()
-        {
-            // default: 1 cache-line stride
-            m_stride   = (1 << RubySystem::getBlockSizeBits());
-            m_use_time = Cycles(0);
-            m_is_valid = false;
-        }
+            : m_is_valid(false)
+        {}
 
         //! The base address for the stream prefetch
         Addr m_address;
diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc
--- a/src/mem/ruby/structures/Prefetcher.cc
+++ b/src/mem/ruby/structures/Prefetcher.cc
@@ -29,7 +29,6 @@
 #include "debug/RubyPrefetcher.hh"
 #include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
 #include "mem/ruby/structures/Prefetcher.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 Prefetcher*
 PrefetcherParams::create()
@@ -408,8 +407,7 @@
                         // This stride HAS to be the multiplicative constant of
                         // dataBlockBytes (bc makeNextStrideAddress is
                         // calculated based on this multiplicative constant!)
-                        *stride = m_nonunit_stride[i] /
-                                    RubySystem::getBlockSizeBytes();
+                        *stride = m_nonunit_stride[i] / m_block_size_bytes;
 
                         // clear this filter entry
                         clearNonunitEntry(i);
diff --git a/src/mem/ruby/filters/NonCountingBloomFilter.cc b/src/mem/ruby/filters/NonCountingBloomFilter.cc
--- a/src/mem/ruby/filters/NonCountingBloomFilter.cc
+++ b/src/mem/ruby/filters/NonCountingBloomFilter.cc
@@ -29,7 +29,6 @@
 #include "base/intmath.hh"
 #include "base/str.hh"
 #include "mem/ruby/filters/NonCountingBloomFilter.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
@@ -145,9 +144,8 @@
 int
 NonCountingBloomFilter::get_index(Addr addr)
 {
-    return bitSelect(addr, RubySystem::getBlockSizeBits() + m_offset,
-                     RubySystem::getBlockSizeBits() + m_offset +
-                     m_filter_size_bits - 1);
+    return bitSelect(addr, m_block_size_bits + m_offset,
+                     m_block_size_bits + m_offset + m_filter_size_bits - 1);
 }
 
 
diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh
--- a/src/mem/ruby/network/Network.hh
+++ b/src/mem/ruby/network/Network.hh
@@ -64,8 +64,6 @@
     { return dynamic_cast<const Params *>(_params); }
 
     virtual ~Network();
-    virtual void init();
-
     static uint32_t getNumberOfVirtualNetworks() { return m_virtual_networks; }
     int getNumNodes() const { return m_nodes; }
 
diff --git a/src/mem/ruby/network/Network.cc b/src/mem/ruby/network/Network.cc
--- a/src/mem/ruby/network/Network.cc
+++ b/src/mem/ruby/network/Network.cc
@@ -40,6 +40,7 @@
 {
     m_virtual_networks = p->number_of_virtual_networks;
     m_control_msg_size = p->control_msg_size;
+    m_data_msg_size = p->block_size_bytes + m_control_msg_size;
 
     // Total nodes/controllers in network
     // Must make sure this is called after the State Machine constructors
@@ -99,12 +100,6 @@
     delete m_topology_ptr;
 }
 
-void
-Network::init()
-{
-    m_data_msg_size = RubySystem::getBlockSizeBytes() + m_control_msg_size;
-}
-
 uint32_t
 Network::MessageSizeType_to_int(MessageSizeType size_type)
 {
diff --git a/src/mem/ruby/filters/BlockBloomFilter.cc b/src/mem/ruby/filters/BlockBloomFilter.cc
--- a/src/mem/ruby/filters/BlockBloomFilter.cc
+++ b/src/mem/ruby/filters/BlockBloomFilter.cc
@@ -29,7 +29,6 @@
 #include "base/intmath.hh"
 #include "base/str.hh"
 #include "mem/ruby/filters/BlockBloomFilter.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
@@ -143,13 +142,13 @@
     // Pull out some bit field ==> B1
     // Pull out additional bits, not the same as B1 ==> B2
     //  XOR B1 and B2 to get hash index
-    Addr block_bits = bitSelect(addr, RubySystem::getBlockSizeBits(),
-                       2 * RubySystem::getBlockSizeBits() - 1);
+    Addr block_bits = bitSelect(addr, m_block_size_bits,
+                                2 * m_block_size_bits - 1);
     int offset = 5;
     Addr other_bits = bitSelect(addr,
-                       2 * RubySystem::getBlockSizeBits() + offset,
-                       2 * RubySystem::getBlockSizeBits() + offset +
-                       m_filter_size_bits - 1);
+                                2 * m_block_size_bits + offset,
+                                2 * m_block_size_bits + offset +
+                                m_filter_size_bits - 1);
     int index = block_bits ^ other_bits;
     assert(index < m_filter_size);
     return index;
diff --git a/src/mem/ruby/filters/BulkBloomFilter.cc b/src/mem/ruby/filters/BulkBloomFilter.cc
--- a/src/mem/ruby/filters/BulkBloomFilter.cc
+++ b/src/mem/ruby/filters/BulkBloomFilter.cc
@@ -31,7 +31,6 @@
 #include "base/intmath.hh"
 #include "base/str.hh"
 #include "mem/ruby/filters/BulkBloomFilter.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
@@ -88,12 +87,13 @@
 {
     // c0 contains the cache index bits
     int set_bits = m_sector_bits;
-    int block_bits = RubySystem::getBlockSizeBits();
-    int c0 = bitSelect(addr, block_bits, block_bits + set_bits - 1);
+    int c0 = bitSelect(addr, m_block_size_bits,
+                       m_block_size_bits + set_bits - 1);
     // c1 contains the lower m_sector_bits permuted bits
     //Address permuted_bits = permute(addr);
     //int c1 = permuted_bits.bitSelect(0, set_bits-1);
-    int c1 = bitSelect(addr, block_bits+set_bits, (block_bits+2*set_bits) - 1);
+    int c1 = bitSelect(addr, m_block_size_bits + set_bits,
+                       (m_block_size_bits + 2 * set_bits) - 1);
     //assert(c0 < (m_filter_size/2));
     //assert(c0 + (m_filter_size/2) < m_filter_size);
     //assert(c1 < (m_filter_size/2));
@@ -114,12 +114,13 @@
 {
     // c0 contains the cache index bits
     int set_bits = m_sector_bits;
-    int block_bits = RubySystem::getBlockSizeBits();
-    int c0 = bitSelect(addr, block_bits, block_bits + set_bits - 1);
+    int c0 = bitSelect(addr, m_block_size_bits,
+                       m_block_size_bits + set_bits - 1);
     // c1 contains the lower 10 permuted bits
     //Address permuted_bits = permute(addr);
     //int c1 = permuted_bits.bitSelect(0, set_bits-1);
-    int c1 = bitSelect(addr, block_bits+set_bits, (block_bits+2*set_bits) - 1);
+    int c1 = bitSelect(addr, m_block_size_bits + set_bits,
+                       (m_block_size_bits + 2 * set_bits) - 1);
     //assert(c0 < (m_filter_size/2));
     //assert(c0 + (m_filter_size/2) < m_filter_size);
     //assert(c1 < (m_filter_size/2));
@@ -211,16 +212,15 @@
 int
 BulkBloomFilter::get_index(Addr addr)
 {
-    return bitSelect(addr, RubySystem::getBlockSizeBits(),
-                     RubySystem::getBlockSizeBits() +
-                     m_filter_size_bits - 1);
+    return bitSelect(addr, m_block_size_bits,
+                     m_block_size_bits + m_filter_size_bits - 1);
 }
 
 Addr
 BulkBloomFilter::permute(Addr addr)
 {
     // permutes the original address bits according to Table 5
-    int block_offset = RubySystem::getBlockSizeBits();
+    int block_offset = m_block_size_bits;
     Addr part1 = bitSelect(addr, block_offset, block_offset + 6),
         part2 = bitSelect(addr, block_offset + 9, block_offset + 9),
         part3 = bitSelect(addr, block_offset + 11, block_offset + 11),
@@ -240,8 +240,7 @@
 
     // assume 32 bit addresses (both virtual and physical)
     // select the remaining high-order 11 bits
-    Addr remaining_bits =
-        bitSelect(addr, block_offset + 21, 31) << 21;
+    Addr remaining_bits = bitSelect(addr, block_offset + 21, 31) << 21;
     result = result | remaining_bits;
 
     return result;
diff --git a/src/mem/ruby/filters/LSB_CountingBloomFilter.cc b/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
--- a/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
+++ b/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
@@ -28,7 +28,6 @@
 
 #include "base/intmath.hh"
 #include "mem/ruby/filters/LSB_CountingBloomFilter.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
@@ -144,9 +143,8 @@
 int
 LSB_CountingBloomFilter::get_index(Addr addr)
 {
-    return bitSelect(addr, RubySystem::getBlockSizeBits(),
-                     RubySystem::getBlockSizeBits() +
-                     m_filter_size_bits - 1);
+    return bitSelect(addr, m_block_size_bits,
+                     m_block_size_bits + m_filter_size_bits - 1);
 }
 
 
diff --git a/src/mem/ruby/filters/MultiGrainBloomFilter.cc b/src/mem/ruby/filters/MultiGrainBloomFilter.cc
--- a/src/mem/ruby/filters/MultiGrainBloomFilter.cc
+++ b/src/mem/ruby/filters/MultiGrainBloomFilter.cc
@@ -29,7 +29,6 @@
 #include "base/intmath.hh"
 #include "base/str.hh"
 #include "mem/ruby/filters/MultiGrainBloomFilter.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 using namespace std;
 
@@ -163,15 +162,14 @@
 MultiGrainBloomFilter::get_block_index(Addr addr)
 {
     // grap a chunk of bits after byte offset
-    return bitSelect(addr, RubySystem::getBlockSizeBits(),
-                     RubySystem::getBlockSizeBits() +
-                     m_filter_size_bits - 1);
+    return bitSelect(addr, m_block_size_bits,
+                     m_block_size_bits + m_filter_size_bits - 1);
 }
 
 int
 MultiGrainBloomFilter::get_page_index(Addr addr)
 {
-    int bits = RubySystem::getBlockSizeBits() + m_filter_size_bits - 1;
+    int bits = m_block_size_bits + m_filter_size_bits - 1;
 
     // grap a chunk of bits after first chunk
     return bitSelect(addr, bits, bits + m_page_filter_size_bits - 1);
diff --git a/src/mem/ruby/common/DataBlock.cc b/src/mem/ruby/common/DataBlock.cc
--- a/src/mem/ruby/common/DataBlock.cc
+++ b/src/mem/ruby/common/DataBlock.cc
@@ -29,7 +29,6 @@
 #include "mem/ruby/common/DataBlock.hh"
 
 #include "mem/ruby/common/WriteMask.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 DataBlock::DataBlock()
     : m_data(nullptr), m_alloc(false), m_block_size_bytes(0)
diff --git a/src/mem/ruby/common/WriteMask.hh b/src/mem/ruby/common/WriteMask.hh
--- a/src/mem/ruby/common/WriteMask.hh
+++ b/src/mem/ruby/common/WriteMask.hh
@@ -37,7 +37,6 @@
 #include "base/types.hh"
 #include "mem/ruby/common/DataBlock.hh"
 #include "mem/ruby/common/TypeDefines.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 class WriteMask
 {
diff --git a/src/mem/ruby/common/WriteMask.cc b/src/mem/ruby/common/WriteMask.cc
--- a/src/mem/ruby/common/WriteMask.cc
+++ b/src/mem/ruby/common/WriteMask.cc
@@ -30,8 +30,6 @@
 
 #include <string>
 
-#include "mem/ruby/system/RubySystem.hh"
-
 void
 WriteMask::print(std::ostream& out) const
 {
diff --git a/src/mem/protocol/GPU_RfO-TCP.sm b/src/mem/protocol/GPU_RfO-TCP.sm
--- a/src/mem/protocol/GPU_RfO-TCP.sm
+++ b/src/mem/protocol/GPU_RfO-TCP.sm
@@ -125,7 +125,7 @@
   }
 
   TBETable * TBEs, template="<TCP_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
diff --git a/src/mem/protocol/GPU_VIPER-SQC.sm b/src/mem/protocol/GPU_VIPER-SQC.sm
--- a/src/mem/protocol/GPU_VIPER-SQC.sm
+++ b/src/mem/protocol/GPU_VIPER-SQC.sm
@@ -91,7 +91,7 @@
   }
 
   TBETable * TBEs, template="<SQC_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();
diff --git a/src/mem/protocol/GPU_VIPER-TCP.sm b/src/mem/protocol/GPU_VIPER-TCP.sm
--- a/src/mem/protocol/GPU_VIPER-TCP.sm
+++ b/src/mem/protocol/GPU_VIPER-TCP.sm
@@ -115,7 +115,7 @@
   }
 
   TBETable * TBEs, template="<TCP_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
   int WTcnt, default="0";
   int Fcnt, default="0";
   bool inFlush, default="false";
diff --git a/src/mem/protocol/MESI_Three_Level-L1cache.sm b/src/mem/protocol/MESI_Three_Level-L1cache.sm
--- a/src/mem/protocol/MESI_Three_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Three_Level-L1cache.sm
@@ -149,7 +149,7 @@
 
   TBETable * TBEs, template="<L1Cache_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
-  int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int l2_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Cycles ticksToCycles(Tick t);
diff --git a/src/mem/protocol/MESI_Two_Level-L1cache.sm b/src/mem/protocol/MESI_Two_Level-L1cache.sm
--- a/src/mem/protocol/MESI_Two_Level-L1cache.sm
+++ b/src/mem/protocol/MESI_Two_Level-L1cache.sm
@@ -154,7 +154,7 @@
 
   TBETable * TBEs, template="<L1Cache_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
-  int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int l2_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Cycles ticksToCycles(Tick t);
diff --git a/src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm b/src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm
--- a/src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm
+++ b/src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm
@@ -185,7 +185,7 @@
 
   // Stores only region addresses
   TBETable * TBEs, template="<RegionBuffer_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
@@ -198,8 +198,8 @@
   void wakeUpBuffers(Addr a);
   Cycles curCycle();
 
-  int blockBits,  default="RubySystem::getBlockSizeBits()";
-  int blockBytes, default="RubySystem::getBlockSizeBytes()";
+  int blockBits,  default="getBlockSizeBits()";
+  int blockBytes, default="getBlockSizeBytes()";
   int regionBits, default="log2(m_blocksPerRegion)";
 
   // Functions
diff --git a/src/mem/protocol/MOESI_AMD_Base-RegionDir.sm b/src/mem/protocol/MOESI_AMD_Base-RegionDir.sm
--- a/src/mem/protocol/MOESI_AMD_Base-RegionDir.sm
+++ b/src/mem/protocol/MOESI_AMD_Base-RegionDir.sm
@@ -159,7 +159,7 @@
 
   // Stores only region addresses
   TBETable * TBEs, template="<RegionDir_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
@@ -172,8 +172,8 @@
   void wakeUpBuffers(Addr a);
   Cycles curCycle();
 
-  int blockBits,  default="RubySystem::getBlockSizeBits()";
-  int blockBytes, default="RubySystem::getBlockSizeBytes()";
+  int blockBits,  default="getBlockSizeBits()";
+  int blockBytes, default="getBlockSizeBytes()";
   int regionBits, default="log2(m_blocksPerRegion)";
 
   // Functions
diff --git a/src/mem/protocol/MOESI_AMD_Base-dir.sm b/src/mem/protocol/MOESI_AMD_Base-dir.sm
--- a/src/mem/protocol/MOESI_AMD_Base-dir.sm
+++ b/src/mem/protocol/MOESI_AMD_Base-dir.sm
@@ -159,7 +159,7 @@
 
   TBETable * TBEs, template="<Directory_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
diff --git a/src/mem/protocol/MOESI_AMD_Base-probeFilter.sm b/src/mem/protocol/MOESI_AMD_Base-probeFilter.sm
--- a/src/mem/protocol/MOESI_AMD_Base-probeFilter.sm
+++ b/src/mem/protocol/MOESI_AMD_Base-probeFilter.sm
@@ -191,7 +191,7 @@
 
   TBETable * TBEs, template="<Directory_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -142,7 +142,7 @@
 
   TBETable * TBEs, template="<L1Cache_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
   TimerTable * useTimerTable;
-  int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int l2_select_low_bit, default="getBlockSizeBits()";
 
   Entry getCacheEntry(Addr addr), return_by_pointer="yes" {
     Entry L1Dcache_entry := static_cast(Entry, "pointer", L1Dcache.lookup(addr));
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -197,7 +197,7 @@
   TBETable * L1_TBEs, template="<L1Cache_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
   bool starving, default="false";
-  int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int l2_select_low_bit, default="getBlockSizeBits()";
 
   PersistentTable * persistentTable, constructor="m_block_size_bits";
   TimerTable * useTimerTable;
diff --git a/src/mem/protocol/MOESI_CMP_token-dir.sm b/src/mem/protocol/MOESI_CMP_token-dir.sm
--- a/src/mem/protocol/MOESI_CMP_token-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_token-dir.sm
@@ -170,7 +170,7 @@
   TBETable * TBEs, template="<Directory_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
 
   bool starving, default="false";
-  int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int l2_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
diff --git a/src/mem/ruby/common/Address.cc b/src/mem/ruby/common/Address.cc
--- a/src/mem/ruby/common/Address.cc
+++ b/src/mem/ruby/common/Address.cc
@@ -29,8 +29,6 @@
 #include "base/intmath.hh"
 #include "mem/ruby/common/Address.hh"
 
-#include "mem/ruby/system/RubySystem.hh"
-
 Addr
 bitSelect(Addr addr, unsigned int small, unsigned int big)
 {
@@ -106,21 +104,21 @@
 Addr
 getOffset(Addr addr, uint32_t block_size_bits)
 {
-    return bitSelect(addr, 0, RubySystem::getBlockSizeBits() - 1);
+    return bitSelect(addr, 0, block_size_bits - 1);
 }
 
 Addr
 makeLineAddress(Addr addr, uint32_t block_size_bits)
 {
-    return maskLowOrderBits(addr, RubySystem::getBlockSizeBits());
+    return maskLowOrderBits(addr, block_size_bits);
 }
 
 // returns the next stride address based on line address
 Addr
 makeNextStrideAddress(Addr addr, int stride, uint32_t block_size_bytes)
 {
-    return maskLowOrderBits(addr, RubySystem::getBlockSizeBits())
-        + RubySystem::getBlockSizeBytes() * stride;
+    return maskLowOrderBits(addr, floorLog2(block_size_bytes))
+        + block_size_bytes * stride;
 }
 
 std::string
@@ -128,7 +126,7 @@
 {
     std::stringstream out;
     out << "[" << std::hex << "0x" << addr << "," << " line 0x"
-       << maskLowOrderBits(addr, RubySystem::getBlockSizeBits())
+       << maskLowOrderBits(addr, block_size_bits)
        << std::dec << "]";
     return out.str();
 }
# Node ID 1273aab7b1f3aad2709ae0ec3da32b9e7ca51022
# Parent  88018e899f82b4f9f1ea3dc5ca7cbc9f0c0f2117
diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc
--- a/src/cpu/testers/rubytest/RubyTester.cc
+++ b/src/cpu/testers/rubytest/RubyTester.cc
@@ -45,7 +45,6 @@
 #include "debug/RubyTest.hh"
 #include "sim/sim_exit.hh"
 #include "sim/system.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 RubyTester::RubyTester(const Params *p)
   : MemObject(p), checkStartEvent(this),
@@ -226,8 +225,8 @@
 
     DPRINTF(RubyTest, "completed request for proc: %d\n", proc);
     DPRINTFR(RubyTest, " addr: 0x%x, size: %d, data: ",
-             address, RubySystem::getBlockSizeBytes());
-    for (int byte = 0; byte < RubySystem::getBlockSizeBytes(); byte++) {
+             address, data->getSize());
+    for (int byte = 0; byte < data->getSize(); byte++) {
         DPRINTFR(RubyTest, "%d ", data->getByte(byte));
     }
     DPRINTFR(RubyTest, "\n");
diff --git a/src/gpu-compute/fetch_unit.cc b/src/gpu-compute/fetch_unit.cc
--- a/src/gpu-compute/fetch_unit.cc
+++ b/src/gpu-compute/fetch_unit.cc
@@ -43,7 +43,6 @@
 #include "gpu-compute/gpu_static_inst.hh"
 #include "gpu-compute/shader.hh"
 #include "gpu-compute/wavefront.hh"
-#include "mem/ruby/system/RubySystem.hh"
 
 uint32_t FetchUnit::globalFetchUnitID;
 
@@ -123,10 +122,10 @@
 
     // Since this is an instruction prefetch, if you're split then just finish
     // out the current line.
-    unsigned block_size = RubySystem::getBlockSizeBytes();
     // check for split accesses
-    Addr split_addr = roundDown(vaddr + block_size - 1, block_size);
-    unsigned size = block_size;
+    Addr split_addr = roundDown(vaddr + m_block_size_bytes - 1,
+                                m_block_size_bytes);
+    unsigned size = m_block_size_bytes;
 
     if (split_addr > vaddr) {
         // misaligned access, just grab the rest of the line
diff --git a/src/gpu-compute/shader.cc b/src/gpu-compute/shader.cc
--- a/src/gpu-compute/shader.cc
+++ b/src/gpu-compute/shader.cc
@@ -47,7 +47,6 @@
 #include "gpu-compute/qstruct.hh"
 #include "gpu-compute/wavefront.hh"
 #include "mem/packet.hh"
-#include "mem/ruby/system/RubySystem.hh"
 #include "sim/sim_exit.hh"
 
 Shader::Shader(const Params *p) : SimObject(p),
@@ -225,7 +224,6 @@
 Shader::doFunctionalAccess(RequestPtr req, MemCmd cmd, void *data,
                            bool suppress_func_errors, int cu_id)
 {
-    unsigned block_size = RubySystem::getBlockSizeBytes();
     unsigned size = req->getSize();
 
     Addr tmp_addr;
@@ -240,9 +238,10 @@
     }
 
     tmp_addr = req->getVaddr();
-    Addr split_addr = roundDown(tmp_addr + size - 1, block_size);
+    Addr split_addr = roundDown(tmp_addr + size - 1, m_block_size_bytes);
 
-    assert(split_addr <= tmp_addr || split_addr - tmp_addr < block_size);
+    assert(split_addr <= tmp_addr ||
+           split_addr - tmp_addr < m_block_size_bytes);
 
     // Misaligned access
     if (split_addr > tmp_addr) {
@@ -343,7 +342,7 @@
 {
     uint8_t *data_buf = (uint8_t*)ptr;
 
-    for (ChunkGenerator gen(address, size, RubySystem::getBlockSizeBytes());
+    for (ChunkGenerator gen(address, size, m_block_size_bytes);
          !gen.done(); gen.next()) {
         Request *req = new Request(0, gen.addr(), gen.size(), 0,
                                    cuList[0]->masterId(), 0, 0, 0);
diff --git a/src/mem/protocol/GPU_RfO-SQC.sm b/src/mem/protocol/GPU_RfO-SQC.sm
--- a/src/mem/protocol/GPU_RfO-SQC.sm
+++ b/src/mem/protocol/GPU_RfO-SQC.sm
@@ -107,7 +107,7 @@
   }
 
   TBETable * TBEs, template="<SQC_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   Tick clockEdge();
   Tick cyclesToTicks(Cycles c);
diff --git a/src/mem/protocol/GPU_RfO-TCC.sm b/src/mem/protocol/GPU_RfO-TCC.sm
--- a/src/mem/protocol/GPU_RfO-TCC.sm
+++ b/src/mem/protocol/GPU_RfO-TCC.sm
@@ -147,7 +147,7 @@
   }
 
   TBETable * TBEs, template="<TCC_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();
diff --git a/src/mem/protocol/GPU_RfO-TCCdir.sm b/src/mem/protocol/GPU_RfO-TCCdir.sm
--- a/src/mem/protocol/GPU_RfO-TCCdir.sm
+++ b/src/mem/protocol/GPU_RfO-TCCdir.sm
@@ -237,7 +237,7 @@
 
   // ** OBJECTS **
   TBETable * TBEs, template="<TCCdir_TBE>", constructor="m_number_of_TBEs, m_block_size_bytes";
-  int TCC_select_low_bit, default="RubySystem::getBlockSizeBits()";
+  int TCC_select_low_bit, default="getBlockSizeBits()";
   NetDest TCC_dir_subtree;
   NetDest temp;