diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/networktest/SConscript --- a/src/cpu/testers/networktest/SConscript Wed Aug 24 11:14:00 2016 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,37 +0,0 @@ -# -*- mode:python -*- - -# Copyright (c) 2009 Advanced Micro Devices, Inc. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Tushar Krishna - -Import('*') - -SimObject('NetworkTest.py') - -Source('networktest.cc') - -DebugFlag('NetworkTest') diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/networktest/networktest.hh --- a/src/cpu/testers/networktest/networktest.hh Wed Aug 24 11:14:00 2016 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,144 +0,0 @@ -/* - * Copyright (c) 2009 Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Tushar Krishna - */ - -#ifndef __CPU_NETWORKTEST_NETWORKTEST_HH__ -#define __CPU_NETWORKTEST_NETWORKTEST_HH__ - -#include - -#include "base/statistics.hh" -#include "mem/mem_object.hh" -#include "mem/port.hh" -#include "params/NetworkTest.hh" -#include "sim/eventq.hh" -#include "sim/sim_exit.hh" -#include "sim/sim_object.hh" -#include "sim/stats.hh" - -class Packet; -class NetworkTest : public MemObject -{ - public: - typedef NetworkTestParams Params; - NetworkTest(const Params *p); - - virtual void init(); - - // main simulation loop (one cycle) - void tick(); - - virtual BaseMasterPort &getMasterPort(const std::string &if_name, - PortID idx = InvalidPortID); - - /** - * Print state of address in memory system via PrintReq (for - * debugging). - */ - void printAddr(Addr a); - - protected: - class TickEvent : public Event - { - private: - NetworkTest *cpu; - - public: - TickEvent(NetworkTest *c) : Event(CPU_Tick_Pri), cpu(c) {} - void process() { cpu->tick(); } - virtual const char *description() const { return "NetworkTest tick"; } - }; - - TickEvent tickEvent; - - class CpuPort : public MasterPort - { - NetworkTest *networktest; - - public: - - CpuPort(const std::string &_name, NetworkTest *_networktest) - : MasterPort(_name, _networktest), networktest(_networktest) - { } - - protected: - - virtual bool recvTimingResp(PacketPtr pkt); - - virtual void recvReqRetry(); - }; - - CpuPort cachePort; - - class NetworkTestSenderState : public Packet::SenderState - { - public: - /** Constructor. */ - NetworkTestSenderState(uint8_t *_data) - : data(_data) - { } - - // Hold onto data pointer - uint8_t *data; - }; - - PacketPtr retryPkt; - unsigned size; - int id; - - unsigned blockSizeBits; - - Tick noResponseCycles; - - int numMemories; - Tick simCycles; - bool fixedPkts; - int maxPackets; - int numPacketsSent; - - int trafficType; - double injRate; - int precision; - - MasterID masterId; - - void completeRequest(PacketPtr pkt); - - void generatePkt(); - void sendPkt(PacketPtr pkt); - - void doRetry(); - - friend class MemCompleteEvent; -}; - -#endif // __CPU_NETWORKTEST_NETWORKTEST_HH__ - - - diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/networktest/networktest.cc --- a/src/cpu/testers/networktest/networktest.cc Wed Aug 24 11:14:00 2016 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,289 +0,0 @@ -/* - * Copyright (c) 2009 Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Tushar Krishna - */ - -#include -#include -#include -#include -#include - -#include "base/misc.hh" -#include "base/random.hh" -#include "base/statistics.hh" -#include "cpu/testers/networktest/networktest.hh" -#include "debug/NetworkTest.hh" -#include "mem/mem_object.hh" -#include "mem/packet.hh" -#include "mem/port.hh" -#include "mem/request.hh" -#include "sim/sim_events.hh" -#include "sim/stats.hh" -#include "sim/system.hh" - -using namespace std; - -int TESTER_NETWORK=0; - -bool -NetworkTest::CpuPort::recvTimingResp(PacketPtr pkt) -{ - networktest->completeRequest(pkt); - return true; -} - -void -NetworkTest::CpuPort::recvReqRetry() -{ - networktest->doRetry(); -} - -void -NetworkTest::sendPkt(PacketPtr pkt) -{ - if (!cachePort.sendTimingReq(pkt)) { - retryPkt = pkt; // RubyPort will retry sending - } - numPacketsSent++; -} - -NetworkTest::NetworkTest(const Params *p) - : MemObject(p), - tickEvent(this), - cachePort("network-test", this), - retryPkt(NULL), - size(p->memory_size), - blockSizeBits(p->block_offset), - numMemories(p->num_memories), - simCycles(p->sim_cycles), - fixedPkts(p->fixed_pkts), - maxPackets(p->max_packets), - numPacketsSent(0), - trafficType(p->traffic_type), - injRate(p->inj_rate), - precision(p->precision), - masterId(p->system->getMasterId(name())) -{ - // set up counters - noResponseCycles = 0; - schedule(tickEvent, 0); - - id = TESTER_NETWORK++; - DPRINTF(NetworkTest,"Config Created: Name = %s , and id = %d\n", - name(), id); -} - -BaseMasterPort & -NetworkTest::getMasterPort(const std::string &if_name, PortID idx) -{ - if (if_name == "test") - return cachePort; - else - return MemObject::getMasterPort(if_name, idx); -} - -void -NetworkTest::init() -{ - numPacketsSent = 0; -} - - -void -NetworkTest::completeRequest(PacketPtr pkt) -{ - Request *req = pkt->req; - - DPRINTF(NetworkTest, "Completed injection of %s packet for address %x\n", - pkt->isWrite() ? "write" : "read\n", - req->getPaddr()); - - assert(pkt->isResponse()); - noResponseCycles = 0; - delete req; - delete pkt; -} - - -void -NetworkTest::tick() -{ - if (++noResponseCycles >= 500000) { - cerr << name() << ": deadlocked at cycle " << curTick() << endl; - fatal(""); - } - - // make new request based on injection rate - // (injection rate's range depends on precision) - // - generate a random number between 0 and 10^precision - // - send pkt if this number is < injRate*(10^precision) - bool send_this_cycle; - double injRange = pow((double) 10, (double) precision); - unsigned trySending = random_mt.random(0, (int) injRange); - if (trySending < injRate*injRange) - send_this_cycle = true; - else - send_this_cycle = false; - - // always generatePkt unless fixedPkts is enabled - if (send_this_cycle) { - if (fixedPkts) { - if (numPacketsSent < maxPackets) { - generatePkt(); - } - } else { - generatePkt(); - } - } - - // Schedule wakeup - if (curTick() >= simCycles) - exitSimLoop("Network Tester completed simCycles"); - else { - if (!tickEvent.scheduled()) - schedule(tickEvent, clockEdge(Cycles(1))); - } -} - -void -NetworkTest::generatePkt() -{ - unsigned destination = id; - if (trafficType == 0) { // Uniform Random - destination = random_mt.random(0, numMemories - 1); - } else if (trafficType == 1) { // Tornado - int networkDimension = (int) sqrt(numMemories); - int my_x = id%networkDimension; - int my_y = id/networkDimension; - - int dest_x = my_x + (int) ceil(networkDimension/2) - 1; - dest_x = dest_x%networkDimension; - int dest_y = my_y; - - destination = dest_y*networkDimension + dest_x; - } else if (trafficType == 2) { // Bit Complement - int networkDimension = (int) sqrt(numMemories); - int my_x = id%networkDimension; - int my_y = id/networkDimension; - - int dest_x = networkDimension - my_x - 1; - int dest_y = networkDimension - my_y - 1; - - destination = dest_y*networkDimension + dest_x; - } - - // The source of the packets is a cache. - // The destination of the packets is a directory. - // The destination bits are embedded in the address after byte-offset. - Addr paddr = destination; - paddr <<= blockSizeBits; - unsigned access_size = 1; // Does not affect Ruby simulation - - // Modeling different coherence msg types over different msg classes. - // - // networktest assumes the Network_test coherence protocol - // which models three message classes/virtual networks. - // These are: request, forward, response. - // requests and forwards are "control" packets (typically 8 bytes), - // while responses are "data" packets (typically 72 bytes). - // - // Life of a packet from the tester into the network: - // (1) This function generatePkt() generates packets of one of the - // following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq - // (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD, - // RubyRequestType_IFETCH, RubyRequestType_ST respectively - // (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers - // in the coherence protocol. - // (4) Network_test-cache.sm tags RubyRequestType:LD, - // RubyRequestType:IFETCH and RubyRequestType:ST as - // Request, Forward, and Response events respectively; - // and injects them into virtual networks 0, 1 and 2 respectively. - // It immediately calls back the sequencer. - // (5) The packet traverses the network (simple/garnet) and reaches its - // destination (Directory), and network stats are updated. - // (6) Network_test-dir.sm simply drops the packet. - // - MemCmd::Command requestType; - - Request *req = nullptr; - Request::Flags flags; - - unsigned randomReqType = random_mt.random(0, 2); - if (randomReqType == 0) { - // generate packet for virtual network 0 - requestType = MemCmd::ReadReq; - req = new Request(paddr, access_size, flags, masterId); - } else if (randomReqType == 1) { - // generate packet for virtual network 1 - requestType = MemCmd::ReadReq; - flags.set(Request::INST_FETCH); - req = new Request(0, 0x0, access_size, flags, masterId, 0x0, 0); - req->setPaddr(paddr); - } else { // if (randomReqType == 2) - // generate packet for virtual network 2 - requestType = MemCmd::WriteReq; - req = new Request(paddr, access_size, flags, masterId); - } - - req->setContext(id); - - //No need to do functional simulation - //We just do timing simulation of the network - - DPRINTF(NetworkTest, - "Generated packet with destination %d, embedded in address %x\n", - destination, req->getPaddr()); - - PacketPtr pkt = new Packet(req, requestType); - pkt->dataDynamic(new uint8_t[req->getSize()]); - pkt->senderState = NULL; - - sendPkt(pkt); -} - -void -NetworkTest::doRetry() -{ - if (cachePort.sendTimingReq(retryPkt)) { - retryPkt = NULL; - } -} - -void -NetworkTest::printAddr(Addr a) -{ - cachePort.printAddr(a); -} - - -NetworkTest * -NetworkTestParams::create() -{ - return new NetworkTest(this); -} diff -r 95026237a5ba -r 302e26678186 configs/example/garnet_synth_traffic.py --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/configs/example/garnet_synth_traffic.py Wed Aug 24 11:20:27 2016 -0400 @@ -0,0 +1,157 @@ +# Copyright (c) 2016 Georgia Institute of Technology +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Author: Tushar Krishna + +import m5 +from m5.objects import * +from m5.defines import buildEnv +from m5.util import addToPath +import os, optparse, sys +addToPath('../common') +addToPath('../ruby') +addToPath('../topologies') + +import Options +import Ruby + +# Get paths we might need. It's expected this file is in m5/configs/example. +config_path = os.path.dirname(os.path.abspath(__file__)) +config_root = os.path.dirname(config_path) +m5_root = os.path.dirname(config_root) + +parser = optparse.OptionParser() +Options.addCommonOptions(parser) + +parser.add_option("--synthetic", type="choice", default="uniform_random", + choices=['uniform_random', 'tornado', 'bit_complement', \ + 'bit_reverse', 'bit_rotation', 'neighbor', \ + 'shuffle', 'transpose']) + +parser.add_option("-i", "--injectionrate", type="float", default=0.1, + metavar="I", + help="Injection rate in packets per cycle per node. \ + Takes decimal value between 0 to 1 (eg. 0.225). \ + Number of digits after 0 depends upon --precision.") + +parser.add_option("--precision", type="int", default=3, + help="Number of digits of precision after decimal point\ + for injection rate") + +parser.add_option("--sim-cycles", type="int", default=1000, + help="Number of simulation cycles") + +parser.add_option("--num-packets-max", type="int", default=-1, + help="Stop injecting after --num-packets-max.\ + Set to -1 to disable.") + +parser.add_option("--single-sender-id", type="int", default=-1, + help="Only inject from this sender.\ + Set to -1 to disable.") + +parser.add_option("--single-dest-id", type="int", default=-1, + help="Only send to this destination.\ + Set to -1 to disable.") + +parser.add_option("--inj-vnet", type="int", default=-1, + help="Only inject in this vnet (0, 1 or 2).\ + 0 and 1 are 1-flit, 2 is 5-flit.\ + Set to -1 to inject randomly in all vnets.") + +# +# Add the ruby specific and protocol specific options +# +Ruby.define_options(parser) + +execfile(os.path.join(config_root, "common", "Options.py")) + +(options, args) = parser.parse_args() + +if args: + print "Error: script doesn't take any positional arguments" + sys.exit(1) + + +if options.inj_vnet > 2: + print "Error: Injection vnet %d should be 0 (1-flit), 1 (1-flit) \ + or 2 (5-flit) or -1 (random)"\ + % (options.inj_vnet) + sys.exit(1) + + +cpus = [ GarnetSyntheticTraffic( + num_packets_max=options.num_packets_max, + single_sender=options.single_sender_id, + single_dest=options.single_dest_id, + sim_cycles=options.sim_cycles, + traffic_type=options.synthetic, + inj_rate=options.injectionrate, + inj_vnet=options.inj_vnet, + precision=options.precision, + num_dest=options.num_dirs) \ + for i in xrange(options.num_cpus) ] + +# create the desired simulated system +system = System(cpu = cpus, mem_ranges = [AddrRange(options.mem_size)]) + + +# Create a top-level voltage domain and clock domain +system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) + +system.clk_domain = SrcClockDomain(clock = options.sys_clock, + voltage_domain = system.voltage_domain) + +Ruby.create_system(options, False, system) + +# Create a seperate clock domain for Ruby +system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, + voltage_domain = system.voltage_domain) + +i = 0 +for ruby_port in system.ruby._cpu_ports: + # + # Tie the cpu test ports to the ruby cpu port + # + cpus[i].test = ruby_port.slave + i += 1 + +# ----------------------- +# run simulation +# ----------------------- + +root = Root(full_system = False, system = system) +root.system.mem_mode = 'timing' + +# Not much point in this being higher than the L1 latency +m5.ticks.setGlobalFrequency('1ns') + +# instantiate configuration +m5.instantiate() + +# simulate until program terminates +exit_event = m5.simulate(options.abs_max_tick) + +print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() diff -r 95026237a5ba -r 302e26678186 configs/example/ruby_network_test.py --- a/configs/example/ruby_network_test.py Wed Aug 24 11:14:00 2016 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,145 +0,0 @@ -# Copyright (c) 2006-2007 The Regents of The University of Michigan -# Copyright (c) 2010 Advanced Micro Devices, Inc. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Ron Dreslinski -# Tushar Krishna - -import m5 -from m5.objects import * -from m5.defines import buildEnv -from m5.util import addToPath -import os, optparse, sys -addToPath('../common') -addToPath('../ruby') -addToPath('../topologies') - -import Options -import Ruby - -# Get paths we might need. It's expected this file is in m5/configs/example. -config_path = os.path.dirname(os.path.abspath(__file__)) -config_root = os.path.dirname(config_path) -m5_root = os.path.dirname(config_root) - -parser = optparse.OptionParser() -Options.addCommonOptions(parser) - -parser.add_option("--synthetic", type="int", default=0, - help="Synthetic Traffic type. 0 = Uniform Random,\ - 1 = Tornado, 2 = Bit Complement") - -parser.add_option("-i", "--injectionrate", type="float", default=0.1, - metavar="I", - help="Injection rate in packets per cycle per node. \ - Takes decimal value between 0 to 1 (eg. 0.225). \ - Number of digits after 0 depends upon --precision.") - -parser.add_option("--precision", type="int", default=3, - help="Number of digits of precision after decimal point\ - for injection rate") - -parser.add_option("--sim-cycles", type="int", default=1000, - help="Number of simulation cycles") - -parser.add_option("--fixed-pkts", action="store_true", - help="Network_test: inject --maxpackets and stop") - -parser.add_option("--maxpackets", type="int", default=1, - help="Stop injecting after --maxpackets. \ - Works only with --fixed-pkts") - -# -# Add the ruby specific and protocol specific options -# -Ruby.define_options(parser) - -execfile(os.path.join(config_root, "common", "Options.py")) - -(options, args) = parser.parse_args() - -if args: - print "Error: script doesn't take any positional arguments" - sys.exit(1) - -block_size = 64 - -if options.num_cpus > block_size: - print "Error: Number of cores %d limited to %d because of false sharing" \ - % (options.num_cpus, block_size) - sys.exit(1) - - -cpus = [ NetworkTest(fixed_pkts=options.fixed_pkts, - max_packets=options.maxpackets, - sim_cycles=options.sim_cycles, - traffic_type=options.synthetic, - inj_rate=options.injectionrate, - precision=options.precision, - num_memories=options.num_dirs) \ - for i in xrange(options.num_cpus) ] - -# create the desired simulated system -system = System(cpu = cpus, mem_ranges = [AddrRange(options.mem_size)]) - - -# Create a top-level voltage domain and clock domain -system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) - -system.clk_domain = SrcClockDomain(clock = options.sys_clock, - voltage_domain = system.voltage_domain) - -Ruby.create_system(options, False, system) - -# Create a seperate clock domain for Ruby -system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, - voltage_domain = system.voltage_domain) - -i = 0 -for ruby_port in system.ruby._cpu_ports: - # - # Tie the cpu test ports to the ruby cpu port - # - cpus[i].test = ruby_port.slave - i += 1 - -# ----------------------- -# run simulation -# ----------------------- - -root = Root(full_system = False, system = system) -root.system.mem_mode = 'timing' - -# Not much point in this being higher than the L1 latency -m5.ticks.setGlobalFrequency('1ns') - -# instantiate configuration -m5.instantiate() - -# simulate until program terminates -exit_event = m5.simulate(options.abs_max_tick) - -print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh Wed Aug 24 11:20:27 2016 -0400 @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2016 Georgia Institute of Technology + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Tushar Krishna + */ + +#ifndef __CPU_GARNET_SYNTHETIC_TRAFFIC_HH__ +#define __CPU_GARNET_SYNTHETIC_TRAFFIC_HH__ + +#include + +#include "base/statistics.hh" +#include "mem/mem_object.hh" +#include "mem/port.hh" +#include "params/GarnetSyntheticTraffic.hh" +#include "sim/eventq.hh" +#include "sim/sim_exit.hh" +#include "sim/sim_object.hh" +#include "sim/stats.hh" + +enum TrafficType {BIT_COMPLEMENT_ = 0, + BIT_REVERSE_ = 1, + BIT_ROTATION_ = 2, + NEIGHBOR_ = 3, + SHUFFLE_ = 4, + TORNADO_ = 5, + TRANSPOSE_ = 6, + UNIFORM_RANDOM_ = 7, + NUM_TRAFFIC_PATTERNS_}; + +class Packet; +class GarnetSyntheticTraffic : public MemObject +{ + public: + typedef GarnetSyntheticTrafficParams Params; + GarnetSyntheticTraffic(const Params *p); + + virtual void init(); + + // main simulation loop (one cycle) + void tick(); + + virtual BaseMasterPort &getMasterPort(const std::string &if_name, + PortID idx = InvalidPortID); + + /** + * Print state of address in memory system via PrintReq (for + * debugging). + */ + void printAddr(Addr a); + + protected: + class TickEvent : public Event + { + private: + GarnetSyntheticTraffic *cpu; + + public: + TickEvent(GarnetSyntheticTraffic *c) : Event(CPU_Tick_Pri), cpu(c) {} + void process() { cpu->tick(); } + virtual const char *description() const { return "GarnetSyntheticTraffic tick"; } + }; + + TickEvent tickEvent; + + class CpuPort : public MasterPort + { + GarnetSyntheticTraffic *tester; + + public: + + CpuPort(const std::string &_name, GarnetSyntheticTraffic *_tester) + : MasterPort(_name, _tester), tester(_tester) + { } + + protected: + + virtual bool recvTimingResp(PacketPtr pkt); + + virtual void recvReqRetry(); + }; + + CpuPort cachePort; + + class GarnetSyntheticTrafficSenderState : public Packet::SenderState + { + public: + /** Constructor. */ + GarnetSyntheticTrafficSenderState(uint8_t *_data) + : data(_data) + { } + + // Hold onto data pointer + uint8_t *data; + }; + + PacketPtr retryPkt; + unsigned size; + int id; + + std::map trafficStringToEnum; + + unsigned blockSizeBits; + + Tick noResponseCycles; + + int numDestinations; + Tick simCycles; + int numPacketsMax; + int numPacketsSent; + int singleSender; + int singleDest; + + std::string trafficType; // string + TrafficType traffic; // enum from string + double injRate; + int injVnet; + int precision; + + const Cycles responseLimit; + + MasterID masterId; + + void completeRequest(PacketPtr pkt); + + void generatePkt(); + void sendPkt(PacketPtr pkt); + void initTrafficType(); + + void doRetry(); + + friend class MemCompleteEvent; +}; + +#endif // __CPU_GARNET_SYNTHETIC_TRAFFIC_HH__ + + + diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc Wed Aug 24 11:20:27 2016 -0400 @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2016 Georgia Institute of Technology + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Tushar Krishna + */ + +#include +#include +#include +#include +#include + +#include "base/misc.hh" +#include "base/random.hh" +#include "base/statistics.hh" +#include "cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh" +#include "debug/GarnetSyntheticTraffic.hh" +#include "mem/mem_object.hh" +#include "mem/packet.hh" +#include "mem/port.hh" +#include "mem/request.hh" +#include "sim/sim_events.hh" +#include "sim/stats.hh" +#include "sim/system.hh" + +using namespace std; + +int TESTER_NETWORK=0; + +bool +GarnetSyntheticTraffic::CpuPort::recvTimingResp(PacketPtr pkt) +{ + tester->completeRequest(pkt); + return true; +} + +void +GarnetSyntheticTraffic::CpuPort::recvReqRetry() +{ + tester->doRetry(); +} + +void +GarnetSyntheticTraffic::sendPkt(PacketPtr pkt) +{ + if (!cachePort.sendTimingReq(pkt)) { + retryPkt = pkt; // RubyPort will retry sending + } + numPacketsSent++; +} + +GarnetSyntheticTraffic::GarnetSyntheticTraffic(const Params *p) + : MemObject(p), + tickEvent(this), + cachePort("GarnetSyntheticTraffic", this), + retryPkt(NULL), + size(p->memory_size), + blockSizeBits(p->block_offset), + numDestinations(p->num_dest), + simCycles(p->sim_cycles), + numPacketsMax(p->num_packets_max), + numPacketsSent(0), + singleSender(p->single_sender), + singleDest(p->single_dest), + trafficType(p->traffic_type), + injRate(p->inj_rate), + injVnet(p->inj_vnet), + precision(p->precision), + responseLimit(p->response_limit), + masterId(p->system->getMasterId(name())) +{ + // set up counters + noResponseCycles = 0; + schedule(tickEvent, 0); + + initTrafficType(); + if (trafficStringToEnum.count(trafficType) == 0) { + fatal("Unknown Traffic Type: %s!\n", traffic); + } + traffic = trafficStringToEnum[trafficType]; + + id = TESTER_NETWORK++; + DPRINTF(GarnetSyntheticTraffic,"Config Created: Name = %s , and id = %d\n", + name(), id); +} + +BaseMasterPort & +GarnetSyntheticTraffic::getMasterPort(const std::string &if_name, PortID idx) +{ + if (if_name == "test") + return cachePort; + else + return MemObject::getMasterPort(if_name, idx); +} + +void +GarnetSyntheticTraffic::init() +{ + numPacketsSent = 0; +} + + +void +GarnetSyntheticTraffic::completeRequest(PacketPtr pkt) +{ + Request *req = pkt->req; + + DPRINTF(GarnetSyntheticTraffic, "Completed injection of %s packet for address %x\n", + pkt->isWrite() ? "write" : "read\n", + req->getPaddr()); + + assert(pkt->isResponse()); + noResponseCycles = 0; + delete req; + delete pkt; +} + + +void +GarnetSyntheticTraffic::tick() +{ + if (++noResponseCycles >= responseLimit) { + fatal("%s deadlocked at cycle %d\n", name(), curTick()); + } + + // make new request based on injection rate + // (injection rate's range depends on precision) + // - generate a random number between 0 and 10^precision + // - send pkt if this number is < injRate*(10^precision) + bool sendAllowedThisCycle; + double injRange = pow((double) 10, (double) precision); + unsigned trySending = random_mt.random(0, (int) injRange); + if (trySending < injRate*injRange) + sendAllowedThisCycle = true; + else + sendAllowedThisCycle = false; + + // always generatePkt unless fixedPkts or singleSender is enabled + if (sendAllowedThisCycle) { + bool senderEnable = true; + + if (numPacketsMax >= 0 && numPacketsSent >= numPacketsMax) + senderEnable = false; + + if (singleSender >= 0 && id != singleSender) + senderEnable = false; + + if (senderEnable) + generatePkt(); + } + + // Schedule wakeup + if (curTick() >= simCycles) + exitSimLoop("Network Tester completed simCycles"); + else { + if (!tickEvent.scheduled()) + schedule(tickEvent, clockEdge(Cycles(1))); + } +} + +void +GarnetSyntheticTraffic::generatePkt() +{ + int num_destinations = numDestinations; + int radix = (int) sqrt(num_destinations); + unsigned destination = id; + int dest_x = -1; + int dest_y = -1; + int source = id; + int src_x = id%radix; + int src_y = id/radix; + + if (singleDest >= 0) + { + destination = singleDest; + } else if (traffic == UNIFORM_RANDOM_) { + destination = random_mt.random(0, num_destinations - 1); + } else if (traffic == BIT_COMPLEMENT_) { + dest_x = radix - src_x - 1; + dest_y = radix - src_y - 1; + destination = dest_y*radix + dest_x; + } else if (traffic == BIT_REVERSE_) { + unsigned int straight = source; + unsigned int reverse = source & 1; // LSB + + int num_bits = (int) log2(num_destinations); + + for (int i = 1; i < num_bits; i++) + { + reverse <<= 1; + straight >>= 1; + reverse |= (straight & 1); // LSB + } + destination = reverse; + } else if (traffic == BIT_ROTATION_) { + if (source%2 == 0) + destination = source/2; + else // (source%2 == 1) + destination = ((source/2) + (num_destinations/2)); + } else if (traffic == NEIGHBOR_) { + dest_x = (src_x + 1) % radix; + dest_y = src_y; + destination = dest_y*radix + dest_x; + } else if (traffic == SHUFFLE_) { + if (source < num_destinations/2) + destination = source*2; + else + destination = (source*2 - num_destinations + 1); + } else if (traffic == TRANSPOSE_) { + dest_x = src_y; + dest_y = src_x; + destination = dest_y*radix + dest_x; + } else if (traffic == TORNADO_) { + dest_x = (src_x + (int) ceil(radix/2) - 1) % radix; + dest_y = src_y; + destination = dest_y*radix + dest_x; + } + else { + fatal("Unknown Traffic Type: %s!\n", traffic); + } + + // The source of the packets is a cache. + // The destination of the packets is a directory. + // The destination bits are embedded in the address after byte-offset. + Addr paddr = destination; + paddr <<= blockSizeBits; + unsigned access_size = 1; // Does not affect Ruby simulation + + // Modeling different coherence msg types over different msg classes. + // + // GarnetSyntheticTraffic assumes the Garnet_standalone coherence protocol + // which models three message classes/virtual networks. + // These are: request, forward, response. + // requests and forwards are "control" packets (typically 8 bytes), + // while responses are "data" packets (typically 72 bytes). + // + // Life of a packet from the tester into the network: + // (1) This function generatePkt() generates packets of one of the + // following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq + // (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD, + // RubyRequestType_IFETCH, RubyRequestType_ST respectively + // (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers + // in the coherence protocol. + // (4) Network_test-cache.sm tags RubyRequestType:LD, + // RubyRequestType:IFETCH and RubyRequestType:ST as + // Request, Forward, and Response events respectively; + // and injects them into virtual networks 0, 1 and 2 respectively. + // It immediately calls back the sequencer. + // (5) The packet traverses the network (simple/garnet) and reaches its + // destination (Directory), and network stats are updated. + // (6) Network_test-dir.sm simply drops the packet. + // + MemCmd::Command requestType; + + Request *req = nullptr; + Request::Flags flags; + + // Inject in specific Vnet + // Vnet 0 and 1 are for control packets (1-flit) + // Vnet 2 is for data packets (5-flit) + int injReqType = injVnet; + + if (injReqType < 0 || injReqType > 2) + { + // randomly inject in any vnet + injReqType = random_mt.random(0, 2); + } + + if (injReqType == 0) { + // generate packet for virtual network 0 + requestType = MemCmd::ReadReq; + req = new Request(paddr, access_size, flags, masterId); + } else if (injReqType == 1) { + // generate packet for virtual network 1 + requestType = MemCmd::ReadReq; + flags.set(Request::INST_FETCH); + req = new Request(0, 0x0, access_size, flags, masterId, 0x0, 0); + req->setPaddr(paddr); + } else { // if (injReqType == 2) + // generate packet for virtual network 2 + requestType = MemCmd::WriteReq; + req = new Request(paddr, access_size, flags, masterId); + } + + req->setContext(id); + + //No need to do functional simulation + //We just do timing simulation of the network + + DPRINTF(GarnetSyntheticTraffic, + "Generated packet with destination %d, embedded in address %x\n", + destination, req->getPaddr()); + + PacketPtr pkt = new Packet(req, requestType); + pkt->dataDynamic(new uint8_t[req->getSize()]); + pkt->senderState = NULL; + + sendPkt(pkt); +} + +void +GarnetSyntheticTraffic::initTrafficType() +{ + trafficStringToEnum["bit_complement"] = BIT_COMPLEMENT_; + trafficStringToEnum["bit_reverse"] = BIT_REVERSE_; + trafficStringToEnum["bit_rotation"] = BIT_ROTATION_; + trafficStringToEnum["neighbor"] = NEIGHBOR_; + trafficStringToEnum["shuffle"] = SHUFFLE_; + trafficStringToEnum["tornado"] = TORNADO_; + trafficStringToEnum["transpose"] = TRANSPOSE_; + trafficStringToEnum["uniform_random"] = UNIFORM_RANDOM_; +} + +void +GarnetSyntheticTraffic::doRetry() +{ + if (cachePort.sendTimingReq(retryPkt)) { + retryPkt = NULL; + } +} + +void +GarnetSyntheticTraffic::printAddr(Addr a) +{ + cachePort.printAddr(a); +} + + +GarnetSyntheticTraffic * +GarnetSyntheticTrafficParams::create() +{ + return new GarnetSyntheticTraffic(this); +} diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.py --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.py Wed Aug 24 11:20:27 2016 -0400 @@ -0,0 +1,57 @@ +# Copyright (c) 2016 Georgia Institute of Technology +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Tushar Krishna + +from MemObject import MemObject +from m5.params import * +from m5.proxy import * + +class GarnetSyntheticTraffic(MemObject): + type = 'GarnetSyntheticTraffic' + cxx_header = \ + "cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh" + block_offset = Param.Int(6, "block offset in bits") + num_dest = Param.Int(1, "Number of Destinations") + memory_size = Param.Int(65536, "memory size") + sim_cycles = Param.Int(1000, "Number of simulation cycles") + num_packets_max = Param.Int(-1, "Max number of packets to send. \ + Default is to keep sending till simulation ends") + single_sender = Param.Int(-1, "Send only from this node. \ + By default every node sends") + single_dest = Param.Int(-1, "Send only to this dest. \ + Default depends on traffic_type") + traffic_type = Param.String("uniform_random", "Traffic type") + inj_rate = Param.Float(0.1, "Packet injection rate") + inj_vnet = Param.Int(-1, "Vnet to inject in. \ + 0 and 1 are 1-flit, 2 is 5-flit. \ + Default is to inject in all three vnets") + precision = Param.Int(3, "Number of digits of precision \ + after decimal point") + response_limit = Param.Cycles(5000000, "Cycles before exiting \ + due to lack of progress") + test = MasterPort("Port to the memory system to test") + system = Param.System(Parent.any, "System we belong to") diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/garnet_synthetic_traffic/SConscript --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/testers/garnet_synthetic_traffic/SConscript Wed Aug 24 11:20:27 2016 -0400 @@ -0,0 +1,37 @@ +# -*- mode:python -*- + +# Copyright (c) 2016 Georgia Institute of Technology. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Tushar Krishna + +Import('*') + +SimObject('GarnetSyntheticTraffic.py') + +Source('GarnetSyntheticTraffic.cc') + +DebugFlag('GarnetSyntheticTraffic') diff -r 95026237a5ba -r 302e26678186 src/cpu/testers/networktest/NetworkTest.py --- a/src/cpu/testers/networktest/NetworkTest.py Wed Aug 24 11:14:00 2016 -0400 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,46 +0,0 @@ -# Copyright (c) 2009 Advanced Micro Devices, Inc. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Tushar Krishna - -from MemObject import MemObject -from m5.params import * -from m5.proxy import * - -class NetworkTest(MemObject): - type = 'NetworkTest' - cxx_header = "cpu/testers/networktest/networktest.hh" - block_offset = Param.Int(6, "block offset in bits") - num_memories = Param.Int(1, "Num Memories") - memory_size = Param.Int(65536, "memory size") - sim_cycles = Param.Int(1000, "Number of simulation cycles") - fixed_pkts = Param.Bool(False, "Send fixed number of packets") - max_packets = Param.Counter(0, "Number of packets to send when in fixed_pkts mode") - traffic_type = Param.Counter(0, "Traffic type: uniform random, tornado, bit complement") - inj_rate = Param.Float(0.1, "Packet injection rate") - precision = Param.Int(3, "Number of digits of precision after decimal point") - test = MasterPort("Port to the memory system to test") - system = Param.System(Parent.any, "System we belong to")