diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -136,6 +136,11 @@
     bool isPresent(Address);
   }
 
+  void set_cache_entry(Entry b);
+  void unset_cache_entry();
+  void set_tbe(TBE b);
+  void unset_tbe();
+  Entry getCacheEntry(Address address);
 
   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 
@@ -143,100 +148,84 @@
   TimerTable useTimerTable;
   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
 
-  Entry getCacheEntry(Address addr), return_by_ref="yes" {
-    if (L1DcacheMemory.isTagPresent(addr)) {
-      return static_cast(Entry, L1DcacheMemory[addr]);
-    } else {
-      return static_cast(Entry, L1IcacheMemory[addr]);
-    }
-  }
+  //bool isCacheTagPresent(Address addr) {
+  //  return (L1DcacheMemory.isTagPresent(addr) || L1IcacheMemory.isTagPresent(addr));
+  //}
 
-  void changePermission(Address addr, AccessPermission permission) {
-    if (L1DcacheMemory.isTagPresent(addr)) {
-      return L1DcacheMemory.changePermission(addr, permission);
-    } else {
-      return L1IcacheMemory.changePermission(addr, permission);
-    }
-  }
-
-  bool isCacheTagPresent(Address addr) {
-    return (L1DcacheMemory.isTagPresent(addr) || L1IcacheMemory.isTagPresent(addr));
-  }
-
-  State getState(Address addr) {
+  State getState(TBE tbe, Entry cache_entry, Address addr) {
     assert((L1DcacheMemory.isTagPresent(addr) && L1IcacheMemory.isTagPresent(addr)) == false);
 
-    if(TBEs.isPresent(addr)) {
-      return TBEs[addr].TBEState;
-    } else if (isCacheTagPresent(addr)) {
-      return getCacheEntry(addr).CacheState;
+    if(is_valid_ptr(tbe_ptr)) {
+      return tbe.TBEState;
+    } else if (is_valid_ptr(cache_entry_ptr)) {
+      return cache_entry.CacheState;
     }
     return State:I;
   }
 
-  void setState(Address addr, State state) {
+  void setState(TBE tbe, Entry cache_entry, Address addr, State state) {
     assert((L1DcacheMemory.isTagPresent(addr) && L1IcacheMemory.isTagPresent(addr)) == false);
 
-    if (TBEs.isPresent(addr)) {
-      TBEs[addr].TBEState := state;
+    if (is_valid_ptr(tbe_ptr)) {
+      tbe.TBEState := state;
     }
 
-    if (isCacheTagPresent(addr)) {
-      if ( ((getCacheEntry(addr).CacheState != State:M) && (state == State:M)) ||
-         ((getCacheEntry(addr).CacheState != State:MM) && (state == State:MM)) ||
-         ((getCacheEntry(addr).CacheState != State:S) && (state == State:S)) ||
-         ((getCacheEntry(addr).CacheState != State:O) && (state == State:O)) ) {
+    if (is_valid_ptr(cache_entry_ptr)) {
+      if ( ((cache_entry.CacheState != State:M) && (state == State:M)) ||
+         ((cache_entry.CacheState != State:MM) && (state == State:MM)) ||
+         ((cache_entry.CacheState != State:S) && (state == State:S)) ||
+         ((cache_entry.CacheState != State:O) && (state == State:O)) ) {
 
-        getCacheEntry(addr).CacheState := state;
+        cache_entry.CacheState := state;
         sequencer.checkCoherence(addr);
       }
       else {
-        getCacheEntry(addr).CacheState := state;
+        cache_entry.CacheState := state;
       }
 
       // Set permission
       if (state == State:MM || state == State:MM_W) {
-        changePermission(addr, AccessPermission:Read_Write);
+        cache_entry.changePermission(AccessPermission:Read_Write);
       } else if ((state == State:S) ||
                  (state == State:O) ||
                  (state == State:M) ||
                  (state == State:M_W) ||
                  (state == State:SM) ||
                  (state == State:OM)) {
-        changePermission(addr, AccessPermission:Read_Only);
+        cache_entry.changePermission(AccessPermission:Read_Only);
       } else {
-        changePermission(addr, AccessPermission:Invalid);
+        cache_entry.changePermission(AccessPermission:Invalid);
       }
     }
   }
 
-  bool isBlockExclusive(Address addr) {
+  //bool isBlockExclusive(Address addr) {
+  //
+  //  if (isCacheTagPresent(addr)) {
+  //    if ( (getCacheEntry(addr).CacheState == State:M) || (getCacheEntry(addr).CacheState == State:MM)
+  //         || (getCacheEntry(addr).CacheState == State:MI) || (getCacheEntry(addr).CacheState == State:MM_W)
+  //       ) {
+  //      return true;
+  //    }
+  //  }
+  //
+  //  return false;
+  //}
 
-    if (isCacheTagPresent(addr)) {
-      if ( (getCacheEntry(addr).CacheState == State:M) || (getCacheEntry(addr).CacheState == State:MM)
-           || (getCacheEntry(addr).CacheState == State:MI) || (getCacheEntry(addr).CacheState == State:MM_W)
-         ) {
-        return true;
-      }
-    }
-
-    return false;
-  }
-
-  bool isBlockShared(Address addr) {
-    if (isCacheTagPresent(addr)) {
-      if ( (getCacheEntry(addr).CacheState == State:S) || (getCacheEntry(addr).CacheState == State:O)
-           || (getCacheEntry(addr).CacheState == State:SM)
-           || (getCacheEntry(addr).CacheState == State:OI)
-           || (getCacheEntry(addr).CacheState == State:SI)
-           || (getCacheEntry(addr).CacheState == State:OM)
-           ) {
-        return true;
-      }
-    }
-
-    return false;
-  }
+  //bool isBlockShared(Address addr) {
+  //  if (isCacheTagPresent(addr)) {
+  //    if ( (getCacheEntry(addr).CacheState == State:S) || (getCacheEntry(addr).CacheState == State:O)
+  //         || (getCacheEntry(addr).CacheState == State:SM)
+  //         || (getCacheEntry(addr).CacheState == State:OI)
+  //         || (getCacheEntry(addr).CacheState == State:SI)
+  //         || (getCacheEntry(addr).CacheState == State:OM)
+  //         ) {
+  //      return true;
+  //    }
+  //  }
+  //
+  //  return false;
+  //}
 
 
   Event mandatory_request_type_to_event(CacheRequestType type) {
@@ -265,6 +254,8 @@
   // Use Timer
   in_port(useTimerTable_in, Address, useTimerTable) {
     if (useTimerTable_in.isReady()) {
+        set_cache_entry(getCacheEntry(useTimerTable.readyAddress()));
+        set_tbe(TBEs[useTimerTable.readyAddress()]);
         trigger(Event:Use_Timeout, useTimerTable.readyAddress());
     }
   }
@@ -282,6 +273,8 @@
   in_port(triggerQueue_in, TriggerMsg, triggerQueue) {
     if (triggerQueue_in.isReady()) {
       peek(triggerQueue_in, TriggerMsg) {
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == TriggerType:ALL_ACKS) {
           trigger(Event:All_acks, in_msg.Address);
         } else {
@@ -299,6 +292,10 @@
       peek(requestNetwork_in, RequestMsg, block_on="Address") {
         assert(in_msg.Destination.isElement(machineID));
         DPRINTF(RubySlicc, "L1 received: %s\n", in_msg.Type);
+
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
+
 if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
           if (in_msg.Requestor == machineID && in_msg.RequestorMachine == MachineType:L1Cache) {
             trigger(Event:Own_GETX, in_msg.Address);
@@ -328,6 +325,8 @@
   in_port(responseToL1Cache_in, ResponseMsg, responseToL1Cache) {
     if (responseToL1Cache_in.isReady()) {
       peek(responseToL1Cache_in, ResponseMsg, block_on="Address") {
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == CoherenceResponseType:ACK) {
           trigger(Event:Ack, in_msg.Address);
         } else if (in_msg.Type == CoherenceResponseType:DATA) {
@@ -346,18 +345,22 @@
   in_port(mandatoryQueue_in, CacheMsg, mandatoryQueue, desc="...") {
     if (mandatoryQueue_in.isReady()) {
       peek(mandatoryQueue_in, CacheMsg, block_on="LineAddress") {
+        set_tbe(TBEs[in_msg.LineAddress]);
 
         // Check for data access to blocks in I-cache and ifetchs to blocks in D-cache
 
         if (in_msg.Type == CacheRequestType:IFETCH) {
           // ** INSTRUCTION ACCESS ***
 
+          set_cache_entry(static_cast(Entry, "return_by_pointer", L1DcacheMemory.lookup_ptr(in_msg.LineAddress)));
           // Check to see if it is in the OTHER L1
-          if (L1DcacheMemory.isTagPresent(in_msg.LineAddress)) {
+          if (is_valid_ptr(cache_entry_ptr)) {
             // The block is in the wrong L1, put the request on the queue to the shared L2
             trigger(Event:L1_Replacement, in_msg.LineAddress);
           }
-          if (L1IcacheMemory.isTagPresent(in_msg.LineAddress)) {
+
+          set_cache_entry(static_cast(Entry, "return_by_pointer", L1IcacheMemory.lookup_ptr(in_msg.LineAddress)));
+          if (is_valid_ptr(cache_entry_ptr)) {
             // The tag matches for the L1, so the L1 asks the L2 for it.
             trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
           } else {
@@ -366,6 +369,8 @@
               trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
             } else {
               // No room in the L1, so we need to make room in the L1
+              set_cache_entry(getCacheEntry(L1IcacheMemory.cacheProbe(in_msg.LineAddress)));
+              set_tbe(TBEs[L1IcacheMemory.cacheProbe(in_msg.LineAddress)]);
               trigger(Event:L1_Replacement, L1IcacheMemory.cacheProbe(in_msg.LineAddress));
             }
           }
@@ -373,11 +378,14 @@
           // *** DATA ACCESS ***
 
           // Check to see if it is in the OTHER L1
-          if (L1IcacheMemory.isTagPresent(in_msg.LineAddress)) {
+          set_cache_entry(static_cast(Entry, "return_by_pointer", L1IcacheMemory.lookup_ptr(in_msg.LineAddress)));
+          if (is_valid_ptr(cache_entry_ptr)) {
             // The block is in the wrong L1, put the request on the queue to the shared L2
             trigger(Event:L1_Replacement, in_msg.LineAddress);
           }
-          if (L1DcacheMemory.isTagPresent(in_msg.LineAddress)) {
+
+          set_cache_entry(static_cast(Entry, "return_by_pointer", L1DcacheMemory.lookup_ptr(in_msg.LineAddress)));
+          if (is_valid_ptr(cache_entry_ptr)) {
             // The tag matches for the L1, so the L1 ask the L2 for it
             trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
           } else {
@@ -386,6 +394,8 @@
               trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress);
             } else {
               // No room in the L1, so we need to make room in the L1
+              set_cache_entry(getCacheEntry(L1DcacheMemory.cacheProbe(in_msg.LineAddress)));
+              set_tbe(TBEs[L1DcacheMemory.cacheProbe(in_msg.LineAddress)]);
               trigger(Event:L1_Replacement, L1DcacheMemory.cacheProbe(in_msg.LineAddress));
             }
           }
@@ -418,6 +428,7 @@
         out_msg.Address := address;
         out_msg.Type := CoherenceRequestType:GETX;
         out_msg.Requestor := machineID;
+        out_msg.RequestorMachine := MachineType:L1Cache;
         out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						  l2_select_low_bit, l2_select_num_bits));
         out_msg.MessageSize := MessageSizeType:Request_Control;
@@ -433,6 +444,7 @@
       out_msg.Address := address;
       out_msg.Type := CoherenceRequestType:PUTX;
       out_msg.Requestor := machineID;
+      out_msg.RequestorMachine := MachineType:L1Cache;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Writeback_Control;
@@ -472,8 +484,8 @@
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						    l2_select_low_bit, l2_select_num_bits));
-          out_msg.DataBlk := getCacheEntry(address).DataBlk;
-          // out_msg.Dirty := getCacheEntry(address).Dirty;
+          out_msg.DataBlk := cache_entry.DataBlk;
+          // out_msg.Dirty := cache_entry.Dirty;
           out_msg.Dirty := false;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:Response_Data;
@@ -486,8 +498,8 @@
           out_msg.Type := CoherenceResponseType:DATA;
           out_msg.Sender := machineID;
           out_msg.Destination.add(in_msg.Requestor);
-          out_msg.DataBlk := getCacheEntry(address).DataBlk;
-          // out_msg.Dirty := getCacheEntry(address).Dirty;
+          out_msg.DataBlk := cache_entry.DataBlk;
+          // out_msg.Dirty := cache_entry.Dirty;
           out_msg.Dirty := false;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
@@ -504,8 +516,8 @@
       out_msg.Sender := machineID;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						l2_select_low_bit, l2_select_num_bits));
-      out_msg.DataBlk := getCacheEntry(address).DataBlk;
-      out_msg.Dirty := getCacheEntry(address).Dirty;
+      out_msg.DataBlk := cache_entry.DataBlk;
+      out_msg.Dirty := cache_entry.Dirty;
       out_msg.Acks := 0; // irrelevant
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
@@ -522,8 +534,8 @@
           out_msg.SenderMachine := MachineType:L1Cache;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						    l2_select_low_bit, l2_select_num_bits));
-          out_msg.DataBlk := getCacheEntry(address).DataBlk;
-          out_msg.Dirty := getCacheEntry(address).Dirty;
+          out_msg.DataBlk := cache_entry.DataBlk;
+          out_msg.Dirty := cache_entry.Dirty;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:Response_Data;
         }
@@ -536,8 +548,8 @@
           out_msg.Sender := machineID;
           out_msg.SenderMachine := MachineType:L1Cache;
           out_msg.Destination.add(in_msg.Requestor);
-          out_msg.DataBlk := getCacheEntry(address).DataBlk;
-          out_msg.Dirty := getCacheEntry(address).Dirty;
+          out_msg.DataBlk := cache_entry.DataBlk;
+          out_msg.Dirty := cache_entry.Dirty;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
         }
@@ -590,6 +602,7 @@
       out_msg.Address := address;
       out_msg.Type := CoherenceResponseType:UNBLOCK_EXCLUSIVE;
       out_msg.Sender := machineID;
+      out_msg.SenderMachine := MachineType:L1Cache;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						l2_select_low_bit, l2_select_num_bits));
       out_msg.MessageSize := MessageSizeType:Unblock_Control;
@@ -597,21 +610,22 @@
   }
 
   action(h_load_hit, "h", desc="Notify sequencer the load completed.") {
-    DPRINTF(RubySlicc, "%s\n", getCacheEntry(address).DataBlk);
-    sequencer.readCallback(address, getCacheEntry(address).DataBlk);
+    DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);
+    sequencer.readCallback(address, cache_entry.DataBlk);
   }
 
   action(hh_store_hit, "\h", desc="Notify sequencer that store completed.") {
-    DPRINTF(RubySlicc, "%s\n", getCacheEntry(address).DataBlk);
-    sequencer.writeCallback(address, getCacheEntry(address).DataBlk);
-    getCacheEntry(address).Dirty := true;
+    DPRINTF(RubySlicc, "%s\n", cache_entry.DataBlk);
+    sequencer.writeCallback(address, cache_entry.DataBlk);
+    cache_entry.Dirty := true;
   }
 
   action(i_allocateTBE, "i", desc="Allocate TBE") {
     check_allocate(TBEs);
     TBEs.allocate(address);
-    TBEs[address].DataBlk := getCacheEntry(address).DataBlk; // Data only used for writebacks
-    TBEs[address].Dirty := getCacheEntry(address).Dirty;
+    set_tbe(TBEs[address]);
+    tbe.DataBlk := cache_entry.DataBlk; // Data only used for writebacks
+    tbe.Dirty := cache_entry.Dirty;
   }
 
   action(j_popTriggerQueue, "j", desc="Pop trigger queue.") {
@@ -633,13 +647,13 @@
   action(m_decrementNumberOfMessages, "m", desc="Decrement the number of messages for which we're waiting") {
     peek(responseToL1Cache_in, ResponseMsg) {
       DPRINTF(RubySlicc, "L1 decrementNumberOfMessages: %d\n", in_msg.Acks);
-      TBEs[address].NumPendingMsgs := TBEs[address].NumPendingMsgs - in_msg.Acks;
+      tbe.NumPendingMsgs := tbe.NumPendingMsgs - in_msg.Acks;
     }
   }
 
   action(mm_decrementNumberOfMessages, "\m", desc="Decrement the number of messages for which we're waiting") {
     peek(requestNetwork_in, RequestMsg) {
-      TBEs[address].NumPendingMsgs := TBEs[address].NumPendingMsgs - in_msg.Acks;
+      tbe.NumPendingMsgs := tbe.NumPendingMsgs - in_msg.Acks;
     }
   }
 
@@ -648,7 +662,7 @@
   }
 
   action(o_checkForCompletion, "o", desc="Check if we have received all the messages required for completion") {
-    if (TBEs[address].NumPendingMsgs == 0) {
+    if (tbe.NumPendingMsgs == 0) {
       enqueue(triggerQueue_out, TriggerMsg) {
         out_msg.Address := address;
         out_msg.Type := TriggerType:ALL_ACKS;
@@ -669,8 +683,8 @@
           out_msg.Type := CoherenceResponseType:DATA;
           out_msg.Sender := machineID;
           out_msg.Destination.add(in_msg.Requestor);
-          out_msg.DataBlk := TBEs[address].DataBlk;
-          // out_msg.Dirty := TBEs[address].Dirty;
+          out_msg.DataBlk := tbe.DataBlk;
+          // out_msg.Dirty := tbe.Dirty;
           out_msg.Dirty := false;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
@@ -683,8 +697,8 @@
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						    l2_select_low_bit, l2_select_num_bits));
-          out_msg.DataBlk := TBEs[address].DataBlk;
-          // out_msg.Dirty := TBEs[address].Dirty;
+          out_msg.DataBlk := tbe.DataBlk;
+          // out_msg.Dirty := tbe.Dirty;
           out_msg.Dirty := false;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:Response_Data;
@@ -701,8 +715,8 @@
           out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
           out_msg.Sender := machineID;
           out_msg.Destination.add(in_msg.Requestor);
-          out_msg.DataBlk := TBEs[address].DataBlk;
-          out_msg.Dirty := TBEs[address].Dirty;
+          out_msg.DataBlk := tbe.DataBlk;
+          out_msg.Dirty := tbe.Dirty;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:ResponseLocal_Data;
         }
@@ -714,8 +728,8 @@
           out_msg.Sender := machineID;
           out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						    l2_select_low_bit, l2_select_num_bits));
-          out_msg.DataBlk := TBEs[address].DataBlk;
-          out_msg.Dirty := TBEs[address].Dirty;
+          out_msg.DataBlk := tbe.DataBlk;
+          out_msg.Dirty := tbe.Dirty;
           out_msg.Acks := in_msg.Acks;
           out_msg.MessageSize := MessageSizeType:Response_Data;
         }
@@ -732,25 +746,26 @@
       out_msg.SenderMachine := MachineType:L1Cache;
       out_msg.Destination.add(mapAddressToRange(address, MachineType:L2Cache, 
 						l2_select_low_bit, l2_select_num_bits));
-      out_msg.Dirty := TBEs[address].Dirty;
-      if (TBEs[address].Dirty) {
+      out_msg.Dirty := tbe.Dirty;
+      if (tbe.Dirty) {
         out_msg.Type := CoherenceResponseType:WRITEBACK_DIRTY_DATA;
       } else {
         out_msg.Type := CoherenceResponseType:WRITEBACK_CLEAN_DATA;
       }
-      out_msg.DataBlk := TBEs[address].DataBlk;
+      out_msg.DataBlk := tbe.DataBlk;
       out_msg.MessageSize := MessageSizeType:Writeback_Data;
     }
   }
 
   action(s_deallocateTBE, "s", desc="Deallocate TBE") {
     TBEs.deallocate(address);
+    unset_tbe();
   }
 
   action(u_writeDataToCache, "u", desc="Write data to cache") {
     peek(responseToL1Cache_in, ResponseMsg) {
-      getCacheEntry(address).DataBlk := in_msg.DataBlk;
-      getCacheEntry(address).Dirty := in_msg.Dirty;
+      cache_entry.DataBlk := in_msg.DataBlk;
+      cache_entry.Dirty := in_msg.Dirty;
 
       if (in_msg.Type == CoherenceResponseType:DATA) {
         //assert(in_msg.Dirty == false);
@@ -761,9 +776,9 @@
 
   action(v_writeDataToCacheVerify, "v", desc="Write data to cache, assert it was same as before") {
     peek(responseToL1Cache_in, ResponseMsg) {
-      assert(getCacheEntry(address).DataBlk == in_msg.DataBlk);
-      getCacheEntry(address).DataBlk := in_msg.DataBlk;
-      getCacheEntry(address).Dirty := in_msg.Dirty;
+      assert(cache_entry.DataBlk == in_msg.DataBlk);
+      cache_entry.DataBlk := in_msg.DataBlk;
+      cache_entry.Dirty := in_msg.Dirty;
     }
   }
 
@@ -773,17 +788,18 @@
     } else {
       L1IcacheMemory.deallocate(address);
     }
+    unset_cache_entry();
   }
 
   action(ii_allocateL1DCacheBlock, "\i", desc="Set L1 D-cache tag equal to tag of block B.") {
     if (L1DcacheMemory.isTagPresent(address) == false) {
-      L1DcacheMemory.allocate(address, new Entry);
+      set_cache_entry(static_cast(Entry, "return_by_pointer", L1DcacheMemory.allocate(address, new Entry)));
     }
   }
 
   action(jj_allocateL1ICacheBlock, "\j", desc="Set L1 I-cache tag equal to tag of block B.") {
     if (L1IcacheMemory.isTagPresent(address) == false) {
-      L1IcacheMemory.allocate(address, new Entry);
+      set_cache_entry(static_cast(Entry, "return_by_pointer", L1IcacheMemory.allocate(address, new Entry)));
     }
   }
 
@@ -1173,4 +1189,3 @@
     l_popForwardQueue;
   }
 }
-
diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
@@ -218,9 +218,14 @@
   }
 
 
-  TBETable L2_TBEs, template_hack="<L2Cache_TBE>";
+  TBETable TBEs, template_hack="<L2Cache_TBE>";
   PerfectCacheMemory localDirectory, template_hack="<L2Cache_DirEntry>";
 
+  void set_cache_entry(Entry b);
+  void unset_cache_entry();
+  void set_tbe(TBE b);
+  void unset_tbe();
+  Entry getCacheEntry(Address address);
 
   Entry getL2CacheEntry(Address addr), return_by_ref="yes" {
     if (L2cacheMemory.isTagPresent(addr)) {
@@ -230,12 +235,6 @@
     }
   }
 
-  void changePermission(Address addr, AccessPermission permission) {
-    if (L2cacheMemory.isTagPresent(addr)) {
-      return L2cacheMemory.changePermission(addr, permission);
-    }
-  }
-
   bool isCacheTagPresent(Address addr) {
     return (L2cacheMemory.isTagPresent(addr) );
   }
@@ -244,14 +243,14 @@
     return (localDirectory.isTagPresent(addr) );
   }
 
-  bool isOnlySharer(Address addr, MachineID shar_id) {
+  bool isOnlySharer(Entry cache_entry, Address addr, MachineID shar_id) {
     if (isCacheTagPresent(addr)) {
       assert (localDirectory.isTagPresent(addr) == false);
-      if (getL2CacheEntry(addr).Sharers.count() > 1) {
+      if (cache_entry.Sharers.count() > 1) {
         return false;
       }
-      else if (getL2CacheEntry(addr).Sharers.count() == 1) {
-        if (getL2CacheEntry(addr).Sharers.isElement(shar_id)) {
+      else if (cache_entry.Sharers.count() == 1) {
+        if (cache_entry.Sharers.isElement(shar_id)) {
           return true;
         }
         else {
@@ -422,14 +421,14 @@
     }
   }
 
-  int countLocalSharersExceptRequestor(Address addr, MachineID requestor) {
+  int countLocalSharersExceptRequestor(Entry cache_entry, Address addr, MachineID requestor) {
     if (isCacheTagPresent(addr)) {
       assert (localDirectory.isTagPresent(addr) == false);
-      if (getL2CacheEntry(addr).Sharers.isElement(requestor)) {
-        return ( getL2CacheEntry(addr).Sharers.count() - 1 );
+      if (cache_entry.Sharers.isElement(requestor)) {
+        return ( cache_entry.Sharers.count() - 1 );
       }
       else {
-        return getL2CacheEntry(addr).Sharers.count();
+        return cache_entry.Sharers.count();
       }
     }
     else {
@@ -443,13 +442,12 @@
   }
 
 
-
-  State getState(Address addr) {
-
-    if (L2_TBEs.isPresent(addr)) {
-      return L2_TBEs[addr].TBEState;
-    } else if (isCacheTagPresent(addr)) {
-      return getL2CacheEntry(addr).CacheState;
+  State getState(TBE tbe, Entry cache_entry, Address addr) {
+
+    if (is_valid_ptr(tbe_ptr)) {
+      return tbe.TBEState;
+    } else if (is_valid_ptr(cache_entry_ptr)) {
+      return cache_entry.CacheState;
     } else if (isDirTagPresent(addr)) {
       return localDirectory[addr].DirState;
     } else {
@@ -457,20 +455,15 @@
     }
   }
 
-  std::string getStateStr(Address addr) {
-    return L2Cache_State_to_string(getState(addr));
-  }
-
   std::string getCoherenceRequestTypeStr(CoherenceRequestType type) {
     return CoherenceRequestType_to_string(type);
   }
 
-
-  void setState(Address addr, State state) {
+  void setState(TBE tbe, Entry cache_entry, Address addr, State state) {
     assert((localDirectory.isTagPresent(addr) && L2cacheMemory.isTagPresent(addr)) == false);
 
-    if (L2_TBEs.isPresent(addr)) {
-      L2_TBEs[addr].TBEState := state;
+    if (is_valid_ptr(tbe_ptr)) {
+      tbe.TBEState := state;
     }
 
     if (
@@ -497,20 +490,20 @@
 
 
 
-    if (isCacheTagPresent(addr)) {
-      if ( ((getL2CacheEntry(addr).CacheState != State:M) && (state == State:M)) ||
-           ((getL2CacheEntry(addr).CacheState != State:S) && (state == State:S)) ||
-           ((getL2CacheEntry(addr).CacheState != State:O) && (state == State:O)) ) {
-        getL2CacheEntry(addr).CacheState := state;
+    if (is_valid_ptr(cache_entry_ptr)) {
+      if ( ((cache_entry.CacheState != State:M) && (state == State:M)) ||
+           ((cache_entry.CacheState != State:S) && (state == State:S)) ||
+           ((cache_entry.CacheState != State:O) && (state == State:O)) ) {
+        cache_entry.CacheState := state;
         // disable Coherence Checker for now
         // sequencer.checkCoherence(addr);
       }
       else {
-        getL2CacheEntry(addr).CacheState := state;
+        cache_entry.CacheState := state;
       }
 
       // Set permission
-      changePermission(addr, AccessPermission:Read_Only);
+      cache_entry.changePermission(AccessPermission:Read_Only);
     }
     else if (localDirectory.isTagPresent(addr)) {
       localDirectory[addr].DirState := state;
@@ -560,6 +553,8 @@
   in_port(triggerQueue_in, TriggerMsg, triggerQueue) {
     if (triggerQueue_in.isReady()) {
       peek(triggerQueue_in, TriggerMsg) {
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == TriggerType:ALL_ACKS) {
           trigger(Event:All_Acks, in_msg.Address);
         } else {
@@ -574,6 +569,8 @@
   in_port(requestNetwork_in, RequestMsg, GlobalRequestToL2Cache) {
     if (requestNetwork_in.isReady()) {
       peek(requestNetwork_in, RequestMsg) {
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == CoherenceRequestType:GETX || in_msg.Type == CoherenceRequestType:DMA_WRITE) {
           if (in_msg.Requestor == machineID) {
             trigger(Event:Own_GETX, in_msg.Address);
@@ -601,6 +598,8 @@
     if (L1requestNetwork_in.isReady()) {
       peek(L1requestNetwork_in, RequestMsg) {
         assert(in_msg.Destination.isElement(machineID));
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == CoherenceRequestType:GETX) {
           trigger(Event:L1_GETX, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:GETS) {
@@ -610,7 +609,7 @@
         } else if (in_msg.Type == CoherenceRequestType:PUTX) {
           trigger(Event:L1_PUTX, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:PUTS) {
-          if (isOnlySharer(in_msg.Address, in_msg.Requestor)) {
+          if (isOnlySharer(cache_entry_ptr, in_msg.Address, in_msg.Requestor)) {
             trigger(Event:L1_PUTS_only, in_msg.Address);
           }
           else {
@@ -628,6 +627,8 @@
   in_port(responseNetwork_in, ResponseMsg, responseToL2Cache) {
     if (responseNetwork_in.isReady()) {
       peek(responseNetwork_in, ResponseMsg) {
+        set_cache_entry(getCacheEntry(in_msg.Address));
+        set_tbe(TBEs[in_msg.Address]);
         assert(in_msg.Destination.isElement(machineID));
         if (in_msg.Type == CoherenceResponseType:ACK) {
           if (in_msg.SenderMachine == MachineType:L2Cache) {
@@ -647,6 +648,8 @@
         } else if (in_msg.Type == CoherenceResponseType:WRITEBACK_DIRTY_DATA) {
           if (L2cacheMemory.isTagPresent(in_msg.Address) == false &&
                    L2cacheMemory.cacheAvail(in_msg.Address) == false) {
+            set_cache_entry(getCacheEntry(L2cacheMemory.cacheProbe(in_msg.Address)));
+            set_tbe(TBEs[L2cacheMemory.cacheProbe(in_msg.Address)]);
             trigger(Event:L2_Replacement, L2cacheMemory.cacheProbe(in_msg.Address));
           }
           else {
@@ -655,6 +658,8 @@
         } else if (in_msg.Type == CoherenceResponseType:WRITEBACK_CLEAN_DATA) {
           if (L2cacheMemory.isTagPresent(in_msg.Address) == false &&
                    L2cacheMemory.cacheAvail(in_msg.Address) == false) {
+            set_cache_entry(getCacheEntry(L2cacheMemory.cacheProbe(in_msg.Address)));
+            set_tbe(TBEs[L2cacheMemory.cacheProbe(in_msg.Address)]);
             trigger(Event:L2_Replacement, L2cacheMemory.cacheProbe(in_msg.Address));
           }
           else {
@@ -735,15 +740,15 @@
       out_msg.Address := address;
       out_msg.Type := CoherenceResponseType:DATA;
       out_msg.Sender := machineID;
-      out_msg.Destination.addNetDest(L2_TBEs[address].L1_GetS_IDs);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      // out_msg.Dirty := L2_TBEs[address].Dirty;
+      out_msg.Destination.addNetDest(tbe.L1_GetS_IDs);
+      out_msg.DataBlk := tbe.DataBlk;
+      // out_msg.Dirty := tbe.Dirty;
       // shared data should be clean
       out_msg.Dirty := false;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-		        address, L2_TBEs[address].DataBlk);
+            address, tbe.DataBlk);
   }
 
   action(c_sendDataFromTBEToL1GETX, "\c", desc="Send data from TBE to L1 requestors in TBE") {
@@ -752,14 +757,14 @@
       out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
-      out_msg.Destination.add(L2_TBEs[address].L1_GetX_ID);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      out_msg.Dirty := L2_TBEs[address].Dirty;
-      out_msg.Acks := L2_TBEs[address].Local_GETX_IntAcks;
+      out_msg.Destination.add(tbe.L1_GetX_ID);
+      out_msg.DataBlk := tbe.DataBlk;
+      out_msg.Dirty := tbe.Dirty;
+      out_msg.Acks := tbe.Local_GETX_IntAcks;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, L2_TBEs[address].DataBlk);
+            address, tbe.DataBlk);
   }
 
   action(c_sendExclusiveDataFromTBEToL1GETS, "\cc", desc="Send data from TBE to L1 requestors in TBE") {
@@ -768,9 +773,9 @@
       out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
-      out_msg.Destination.addNetDest(L2_TBEs[address].L1_GetS_IDs);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      out_msg.Dirty := L2_TBEs[address].Dirty;
+      out_msg.Destination.addNetDest(tbe.L1_GetS_IDs);
+      out_msg.DataBlk := tbe.DataBlk;
+      out_msg.Dirty := tbe.Dirty;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
   }
@@ -781,10 +786,10 @@
       out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
-      out_msg.Destination.add(L2_TBEs[address].Fwd_GetX_ID);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      out_msg.Dirty := L2_TBEs[address].Dirty;
-      out_msg.Acks := L2_TBEs[address].Fwd_GETX_ExtAcks;
+      out_msg.Destination.add(tbe.Fwd_GetX_ID);
+      out_msg.DataBlk := tbe.DataBlk;
+      out_msg.Dirty := tbe.Dirty;
+      out_msg.Acks := tbe.Fwd_GETX_ExtAcks;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
   }
@@ -794,16 +799,16 @@
       out_msg.Address := address;
       out_msg.Type := CoherenceResponseType:DATA;
       out_msg.Sender := machineID;
-      out_msg.Destination.addNetDest(L2_TBEs[address].Fwd_GetS_IDs);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      // out_msg.Dirty := L2_TBEs[address].Dirty;
+      out_msg.Destination.addNetDest(tbe.Fwd_GetS_IDs);
+      out_msg.DataBlk := tbe.DataBlk;
+      // out_msg.Dirty := tbe.Dirty;
       // shared data should be clean
       out_msg.Dirty := false;
-      out_msg.Acks := L2_TBEs[address].Fwd_GETX_ExtAcks;
+      out_msg.Acks := tbe.Fwd_GETX_ExtAcks;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, L2_TBEs[address].DataBlk);
+            address, tbe.DataBlk);
   }
 
   action(c_sendExclusiveDataFromTBEToFwdGETS, "\ccc", desc="Send data from TBE to external GETX") {
@@ -812,14 +817,14 @@
       out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
-      out_msg.Destination.addNetDest(L2_TBEs[address].Fwd_GetS_IDs);
-      out_msg.DataBlk := L2_TBEs[address].DataBlk;
-      out_msg.Dirty := L2_TBEs[address].Dirty;
-      out_msg.Acks := L2_TBEs[address].Fwd_GETX_ExtAcks;
+      out_msg.Destination.addNetDest(tbe.Fwd_GetS_IDs);
+      out_msg.DataBlk := tbe.DataBlk;
+      out_msg.Dirty := tbe.Dirty;
+      out_msg.Acks := tbe.Fwd_GETX_ExtAcks;
       out_msg.MessageSize := MessageSizeType:Response_Data;
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, L2_TBEs[address].DataBlk);
+            address, tbe.DataBlk);
   }
 
   action(d_sendDataToL1GETS, "d", desc="Send data directly to L1 requestor") {
@@ -829,15 +834,15 @@
         out_msg.Type := CoherenceResponseType:DATA;
         out_msg.Sender := machineID;
         out_msg.Destination.add(in_msg.Requestor);
-        out_msg.DataBlk := getL2CacheEntry(address).DataBlk;
-        // out_msg.Dirty := getL2CacheEntry(address).Dirty;
+        out_msg.DataBlk := cache_entry.DataBlk;
+        // out_msg.Dirty := cache_entry.Dirty;
         // shared data should be clean
         out_msg.Dirty := false;
         out_msg.MessageSize := MessageSizeType:ResponseL2hit_Data;
       }
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, getL2CacheEntry(address).DataBlk);
+            address, cache_entry.DataBlk);
   }
 
   action(d_sendDataToL1GETX, "\d", desc="Send data and a token from TBE to L1 requestor") {
@@ -848,14 +853,14 @@
         out_msg.Sender := machineID;
         out_msg.SenderMachine := MachineType:L2Cache;
         out_msg.Destination.add(in_msg.Requestor);
-        out_msg.DataBlk := getL2CacheEntry(address).DataBlk;
-        out_msg.Dirty := getL2CacheEntry(address).Dirty;
+        out_msg.DataBlk := cache_entry.DataBlk;
+        out_msg.Dirty := cache_entry.Dirty;
         out_msg.MessageSize := MessageSizeType:ResponseL2hit_Data;
-        out_msg.Acks := L2_TBEs[address].Local_GETX_IntAcks;
+        out_msg.Acks := tbe.Local_GETX_IntAcks;
       }
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, getL2CacheEntry(address).DataBlk);
+            address, cache_entry.DataBlk);
   }
 
   action(dd_sendDataToFwdGETX, "dd", desc="send data") {
@@ -866,14 +871,14 @@
         out_msg.Sender := machineID;
         out_msg.SenderMachine := MachineType:L2Cache;
         out_msg.Destination.add(in_msg.Requestor);
-        out_msg.DataBlk := getL2CacheEntry(address).DataBlk;
-        out_msg.Dirty := getL2CacheEntry(address).Dirty;
+        out_msg.DataBlk := cache_entry.DataBlk;
+        out_msg.Dirty := cache_entry.Dirty;
         out_msg.MessageSize := MessageSizeType:Response_Data;
         out_msg.Acks := in_msg.Acks;
       }
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, getL2CacheEntry(address).DataBlk);
+            address, cache_entry.DataBlk);
   }
 
 
@@ -884,15 +889,15 @@
         out_msg.Type := CoherenceResponseType:DATA;
         out_msg.Sender := machineID;
         out_msg.Destination.add(in_msg.Requestor);
-        out_msg.DataBlk := getL2CacheEntry(address).DataBlk;
-        // out_msg.Dirty := getL2CacheEntry(address).Dirty;
+        out_msg.DataBlk := cache_entry.DataBlk;
+        // out_msg.Dirty := cache_entry.Dirty;
         // shared data should be clean
         out_msg.Dirty := false;
         out_msg.MessageSize := MessageSizeType:Response_Data;
       }
     }
     DPRINTF(RubySlicc, "Address: %s, Data Block: %s\n",
-            address, getL2CacheEntry(address).DataBlk);
+            address, cache_entry.DataBlk);
   }
 
   action(dd_sendExclusiveDataToFwdGETS, "\d\d", desc="send data") {
@@ -902,8 +907,8 @@
         out_msg.Type := CoherenceResponseType:DATA_EXCLUSIVE;
         out_msg.Sender := machineID;
         out_msg.Destination.add(in_msg.Requestor);
-        out_msg.DataBlk := getL2CacheEntry(address).DataBlk;
-        out_msg.Dirty := getL2CacheEntry(address).Dirty;
+        out_msg.DataBlk := cache_entry.DataBlk;
+        out_msg.Dirty := cache_entry.Dirty;
         out_msg.MessageSize := MessageSizeType:Response_Data;
       }
     }
@@ -916,7 +921,7 @@
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
 
-      out_msg.Destination.add( L2_TBEs[address].Fwd_GetX_ID);
+      out_msg.Destination.add( tbe.Fwd_GetX_ID);
       out_msg.Acks := 0 - 1;
       out_msg.MessageSize := MessageSizeType:Response_Control;
     }
@@ -942,19 +947,19 @@
       out_msg.Type := CoherenceResponseType:ACK;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
-      out_msg.Destination.add(L2_TBEs[address].L1_GetX_ID);
+      out_msg.Destination.add(tbe.L1_GetX_ID);
       out_msg.Acks := 0 - 1;
       out_msg.MessageSize := MessageSizeType:Response_Control;
     }
   }
 
   action(ee_sendLocalInv, "\ee", desc="Send local invalidates") {
-    L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address);
+    tbe.NumIntPendingAcks := countLocalSharers(address);
     DPRINTF(RubySlicc, "Address: %s, Local Sharers: %s, Pending Acks: %d\n",
             address, getLocalSharers(address),
-            L2_TBEs[address].NumIntPendingAcks);
+            tbe.NumIntPendingAcks);
     if (isLocalOwnerValid(address)) {
-      L2_TBEs[address].NumIntPendingAcks := L2_TBEs[address].NumIntPendingAcks + 1;
+      tbe.NumIntPendingAcks := tbe.NumIntPendingAcks + 1;
       DPRINTF(RubySlicc, "%s\n", getLocalOwner(address));
     }
 
@@ -975,7 +980,7 @@
   action(ee_sendLocalInvSharersOnly, "\eee", desc="Send local invalidates to sharers if they exist") {
 
     // assert(countLocalSharers(address)  > 0);
-    L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address);
+    tbe.NumIntPendingAcks := countLocalSharers(address);
 
     if (countLocalSharers(address) > 0) {
       enqueue( localRequestNetwork_out, RequestMsg, latency=response_latency ) {
@@ -990,7 +995,7 @@
   }
 
   action(ee_addLocalIntAck, "e\ee", desc="add a local ack to wait for") {
-    L2_TBEs[address].NumIntPendingAcks := L2_TBEs[address].NumIntPendingAcks + 1;
+    tbe.NumIntPendingAcks := tbe.NumIntPendingAcks + 1;
   }
 
   action(ee_issueLocalInvExceptL1Requestor, "\eeee", desc="Send local invalidates to sharers if they exist") {
@@ -998,15 +1003,15 @@
 
 //         assert(countLocalSharers(address) > 0);
         if (countLocalSharers(address) == 0) {
-          L2_TBEs[address].NumIntPendingAcks := 0;
+          tbe.NumIntPendingAcks := 0;
         }
         else {
 
           if (isLocalSharer(address, in_msg.Requestor)) {
-            L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address) - 1;
+            tbe.NumIntPendingAcks := countLocalSharers(address) - 1;
           }
           else {
-            L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address);
+            tbe.NumIntPendingAcks := countLocalSharers(address);
           }
 
           enqueue( localRequestNetwork_out, RequestMsg, latency=response_latency ) {
@@ -1024,23 +1029,23 @@
 
   action(ee_issueLocalInvExceptL1RequestorInTBE, "\eeeeee", desc="Send local invalidates to sharers if they exist") {
     if (countLocalSharers(address) == 0) {
-      L2_TBEs[address].NumIntPendingAcks := 0;
+      tbe.NumIntPendingAcks := 0;
     }
     else {
-      if (isLocalSharer(address, L2_TBEs[address].L1_GetX_ID)) {
-        L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address) - 1;
+      if (isLocalSharer(address, tbe.L1_GetX_ID)) {
+        tbe.NumIntPendingAcks := countLocalSharers(address) - 1;
       }
       else {
-        L2_TBEs[address].NumIntPendingAcks := countLocalSharers(address);
+        tbe.NumIntPendingAcks := countLocalSharers(address);
       }
     }
     enqueue( localRequestNetwork_out, RequestMsg, latency=response_latency ) {
         out_msg.Address := address;
         out_msg.Type := CoherenceRequestType:INV;
-        out_msg.Requestor := L2_TBEs[address].L1_GetX_ID;
+        out_msg.Requestor := tbe.L1_GetX_ID;
         out_msg.RequestorMachine := MachineType:L1Cache;
         out_msg.Destination.addNetDest(getLocalSharers(address));
-        out_msg.Destination.remove(L2_TBEs[address].L1_GetX_ID);
+        out_msg.Destination.remove(tbe.L1_GetX_ID);
         out_msg.MessageSize := MessageSizeType:Invalidate_Control;
     }
   }
@@ -1100,36 +1105,37 @@
 
   action(h_countLocalSharersExceptRequestor, "h", desc="counts number of acks needed for L1 GETX") {
     peek(L1requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].Local_GETX_IntAcks := countLocalSharersExceptRequestor(address, in_msg.Requestor);
+      tbe.Local_GETX_IntAcks := countLocalSharersExceptRequestor(cache_entry_ptr, address, in_msg.Requestor);
     }
   }
 
   action(h_clearIntAcks, "\h", desc="clear IntAcks") {
-    L2_TBEs[address].Local_GETX_IntAcks := 0;
+    tbe.Local_GETX_IntAcks := 0;
   }
 
   action(hh_countLocalSharersExceptL1GETXRequestorInTBE, "hh", desc="counts number of acks needed for L1 GETX") {
-    L2_TBEs[address].Local_GETX_IntAcks := countLocalSharersExceptRequestor(address, L2_TBEs[address].L1_GetX_ID);
+    tbe.Local_GETX_IntAcks := countLocalSharersExceptRequestor(cache_entry_ptr, address, tbe.L1_GetX_ID);
   }
 
   action(i_copyDataToTBE, "\i", desc="Copy data from response queue to TBE") {
     peek(responseNetwork_in, ResponseMsg) {
-      L2_TBEs[address].DataBlk := in_msg.DataBlk;
-      L2_TBEs[address].Dirty := in_msg.Dirty;
+      tbe.DataBlk := in_msg.DataBlk;
+      tbe.Dirty := in_msg.Dirty;
     }
   }
 
   action(i_allocateTBE, "i", desc="Allocate TBE for internal/external request(isPrefetch=0, number of invalidates=0)") {
-    check_allocate(L2_TBEs);
-    L2_TBEs.allocate(address);
-    if(isCacheTagPresent(address)) {
-      L2_TBEs[address].DataBlk := getL2CacheEntry(address).DataBlk;
-      L2_TBEs[address].Dirty := getL2CacheEntry(address).Dirty;
+    check_allocate(TBEs);
+    TBEs.allocate(address);
+    set_tbe(TBEs[address]);
+    if(is_valid_ptr(cache_entry_ptr)) {
+      tbe.DataBlk := cache_entry.DataBlk;
+      tbe.Dirty := cache_entry.Dirty;
     }
-    L2_TBEs[address].NumIntPendingAcks := 0;  // default value
-    L2_TBEs[address].NumExtPendingAcks := 0;  // default value
-    L2_TBEs[address].Fwd_GetS_IDs.clear();
-    L2_TBEs[address].L1_GetS_IDs.clear();
+    tbe.NumIntPendingAcks := 0;  // default value
+    tbe.NumExtPendingAcks := 0;  // default value
+    tbe.Fwd_GetS_IDs.clear();
+    tbe.L1_GetS_IDs.clear();
   }
 
 
@@ -1168,11 +1174,11 @@
     enqueue( localRequestNetwork_out, RequestMsg, latency=response_latency ) {
       out_msg.Address := address;
       out_msg.Type := CoherenceRequestType:GETX;
-      out_msg.Requestor := L2_TBEs[address].L1_GetX_ID;
+      out_msg.Requestor := tbe.L1_GetX_ID;
       out_msg.RequestorMachine := MachineType:L1Cache;
       out_msg.Destination.add(localDirectory[address].Owner);
       out_msg.MessageSize := MessageSizeType:Forwarded_Control;
-      out_msg.Acks := 1 + L2_TBEs[address].Local_GETX_IntAcks;
+      out_msg.Acks := 1 + tbe.Local_GETX_IntAcks;
     }
   }
 
@@ -1252,19 +1258,19 @@
 
   action(m_decrementNumberOfMessagesInt, "\m", desc="Decrement the number of messages for which we're waiting") {
     peek(responseNetwork_in, ResponseMsg) {
-      L2_TBEs[address].NumIntPendingAcks := L2_TBEs[address].NumIntPendingAcks + in_msg.Acks;
+      tbe.NumIntPendingAcks := tbe.NumIntPendingAcks + in_msg.Acks;
     }
   }
 
   action(m_decrementNumberOfMessagesExt, "\mmm", desc="Decrement the number of messages for which we're waiting") {
     peek(responseNetwork_in, ResponseMsg) {
-      L2_TBEs[address].NumExtPendingAcks := L2_TBEs[address].NumExtPendingAcks - in_msg.Acks;
+      tbe.NumExtPendingAcks := tbe.NumExtPendingAcks - in_msg.Acks;
     }
   }
 
   action(mm_decrementNumberOfMessagesExt, "\mm", desc="Decrement the number of messages for which we're waiting") {
     peek(requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].NumExtPendingAcks := L2_TBEs[address].NumExtPendingAcks - in_msg.Acks;
+      tbe.NumExtPendingAcks := tbe.NumExtPendingAcks - in_msg.Acks;
     }
   }
 
@@ -1282,7 +1288,7 @@
 
 
   action(o_checkForIntCompletion, "\o", desc="Check if we have received all the messages required for completion") {
-    if (L2_TBEs[address].NumIntPendingAcks == 0) {
+    if (tbe.NumIntPendingAcks == 0) {
       enqueue(triggerQueue_out, TriggerMsg) {
         out_msg.Address := address;
         out_msg.Type := TriggerType:ALL_ACKS;
@@ -1291,7 +1297,7 @@
   }
 
   action(o_checkForExtCompletion, "\oo", desc="Check if we have received all the messages required for completion") {
-    if (L2_TBEs[address].NumExtPendingAcks == 0) {
+    if (tbe.NumExtPendingAcks == 0) {
       enqueue(triggerQueue_out, TriggerMsg) {
         out_msg.Address := address;
         out_msg.Type := TriggerType:ALL_ACKS;
@@ -1306,79 +1312,81 @@
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:L2Cache;
       out_msg.Destination.add(map_Address_to_Directory(address));
-      out_msg.Dirty := L2_TBEs[address].Dirty;
-      if (L2_TBEs[address].Dirty) {
+      out_msg.Dirty := tbe.Dirty;
+      if (tbe.Dirty) {
         out_msg.Type := CoherenceResponseType:WRITEBACK_DIRTY_DATA;
-        out_msg.DataBlk := L2_TBEs[address].DataBlk;
+        out_msg.DataBlk := tbe.DataBlk;
         out_msg.MessageSize := MessageSizeType:Writeback_Data;
       } else {
          out_msg.Type := CoherenceResponseType:WRITEBACK_CLEAN_ACK;
         // NOTE: in a real system this would not send data.  We send
         // data here only so we can check it at the memory
-         out_msg.DataBlk := L2_TBEs[address].DataBlk;
+         out_msg.DataBlk := tbe.DataBlk;
          out_msg.MessageSize := MessageSizeType:Writeback_Control;
       }
     }
   }
 
   action( r_setMRU, "\rrr", desc="manually set the MRU bit for cache line" ) {
-    if(isCacheTagPresent(address)) {
+    if(is_valid_ptr(cache_entry_ptr)) {
       L2cacheMemory.setMRU(address);
     }
   }
 
   action( s_recordGetXL1ID, "ss", desc="record local GETX requestor") {
     peek(L1requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].L1_GetX_ID := in_msg.Requestor;
+      tbe.L1_GetX_ID := in_msg.Requestor;
     }
   }
 
   action(s_deallocateTBE, "s", desc="Deallocate external TBE") {
-    L2_TBEs.deallocate(address);
+    TBEs.deallocate(address);
+    unset_tbe();
   }
 
   action( s_recordGetSL1ID, "\ss", desc="record local GETS requestor") {
     peek(L1requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].L1_GetS_IDs.add(in_msg.Requestor);
+      tbe.L1_GetS_IDs.add(in_msg.Requestor);
     }
   }
 
   action(t_recordFwdXID, "t", desc="record global GETX requestor") {
     peek(requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].Fwd_GetX_ID := in_msg.Requestor;
-      L2_TBEs[address].Fwd_GETX_ExtAcks := in_msg.Acks;
+      tbe.Fwd_GetX_ID := in_msg.Requestor;
+      tbe.Fwd_GETX_ExtAcks := in_msg.Acks;
     }
   }
 
   action(t_recordFwdSID, "\t", desc="record global GETS requestor") {
     peek(requestNetwork_in, RequestMsg) {
-      L2_TBEs[address].Fwd_GetS_IDs.clear();
-      L2_TBEs[address].Fwd_GetS_IDs.add(in_msg.Requestor);
+      tbe.Fwd_GetS_IDs.clear();
+      tbe.Fwd_GetS_IDs.add(in_msg.Requestor);
     }
   }
 
 
   action(u_writeDataToCache, "u", desc="Write data to cache") {
     peek(responseNetwork_in, ResponseMsg) {
-      getL2CacheEntry(address).DataBlk := in_msg.DataBlk;
-      if ((getL2CacheEntry(address).Dirty == false) && in_msg.Dirty) {
-        getL2CacheEntry(address).Dirty := in_msg.Dirty;
+      cache_entry.DataBlk := in_msg.DataBlk;
+      if ((cache_entry.Dirty == false) && in_msg.Dirty) {
+        cache_entry.Dirty := in_msg.Dirty;
       }
     }
   }
 
   action(vv_allocateL2CacheBlock, "\v", desc="Set L2 cache tag equal to tag of block B.") {
-    L2cacheMemory.allocate(address, new Entry);
+    set_cache_entry(static_cast(Entry, "return_by_pointer", L2cacheMemory.allocate(address, new Entry)));
   }
 
   action(rr_deallocateL2CacheBlock, "\r", desc="Deallocate L2 cache block.  Sets the cache to not present, allowing a replacement in parallel with a fetch.") {
     L2cacheMemory.deallocate(address);
+    unset_cache_entry();
   }
 
 
   action(w_assertIncomingDataAndCacheDataMatch, "w", desc="Assert that the incoming data and the data in the cache match") {
     peek(responseNetwork_in, ResponseMsg) {
-      assert(getL2CacheEntry(address).DataBlk == in_msg.DataBlk);
+      assert(cache_entry.DataBlk == in_msg.DataBlk);
     }
   }
 
diff --git a/src/mem/protocol/MOESI_CMP_directory-dir.sm b/src/mem/protocol/MOESI_CMP_directory-dir.sm
--- a/src/mem/protocol/MOESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm
@@ -119,15 +119,18 @@
   // ** OBJECTS **
   TBETable TBEs, template_hack="<Directory_TBE>";
 
+  void set_tbe(TBE b);
+  void unset_tbe();
+
   Entry getDirectoryEntry(Address addr), return_by_ref="yes" {
     return static_cast(Entry, directory[addr]);
   }
 
-  State getState(Address addr) {
+  State getState(TBE tbe, Entry dir_entry, Address addr) {
     return getDirectoryEntry(addr).DirectoryState;
   }
 
-  void setState(Address addr, State state) {
+  void setState(TBE tbe, Entry dir_entry, Address addr, State state) {
     if (directory.isPresent(addr)) {
 
       if (state == State:I) {
@@ -202,6 +205,7 @@
   in_port(unblockNetwork_in, ResponseMsg, responseToDir) {
     if (unblockNetwork_in.isReady()) {
       peek(unblockNetwork_in, ResponseMsg) {
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == CoherenceResponseType:UNBLOCK) {
           if (getDirectoryEntry(in_msg.Address).WaitingUnblocks == 1) {
             trigger(Event:Last_Unblock, in_msg.Address);
@@ -227,18 +231,25 @@
     if (requestQueue_in.isReady()) {
       peek(requestQueue_in, RequestMsg) {
         if (in_msg.Type == CoherenceRequestType:GETS) {
+          set_tbe(TBEs[in_msg.Address]);
           trigger(Event:GETS, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:GETX) {
+          set_tbe(TBEs[in_msg.Address]);
           trigger(Event:GETX, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:PUTX) {
+          set_tbe(TBEs[in_msg.Address]);
           trigger(Event:PUTX, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:PUTO) {
+          set_tbe(TBEs[in_msg.Address]);
           trigger(Event:PUTO, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:PUTO_SHARERS) {
+          set_tbe(TBEs[in_msg.Address]);
           trigger(Event:PUTO_SHARERS, in_msg.Address);
         } else if (in_msg.Type == CoherenceRequestType:DMA_READ) {
+          set_tbe(TBEs[makeLineAddress(in_msg.Address)]);
           trigger(Event:DMA_READ, makeLineAddress(in_msg.Address));
         } else if (in_msg.Type == CoherenceRequestType:DMA_WRITE) {
+          set_tbe(TBEs[makeLineAddress(in_msg.Address)]);
           trigger(Event:DMA_WRITE, makeLineAddress(in_msg.Address));
         } else {
           error("Invalid message");
@@ -251,6 +262,7 @@
   in_port(memQueue_in, MemoryMsg, memBuffer) {
     if (memQueue_in.isReady()) {
       peek(memQueue_in, MemoryMsg) {
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == MemoryRequestType:MEMORY_READ) {
           trigger(Event:Memory_Data, in_msg.Address);
         } else if (in_msg.Type == MemoryRequestType:MEMORY_WB) {
@@ -271,6 +283,7 @@
         out_msg.Address := address;
         out_msg.Type := CoherenceRequestType:WB_ACK;
         out_msg.Requestor := in_msg.Requestor;
+        out_msg.RequestorMachine := MachineType:Directory;
         out_msg.Destination.add(in_msg.Requestor);
         out_msg.MessageSize := MessageSizeType:Writeback_Control;
       }
@@ -481,9 +494,9 @@
         out_msg.Address := address;
         out_msg.Type := MemoryRequestType:MEMORY_WB;
         out_msg.Sender := machineID;
-	if (TBEs.isPresent(address)) {
-          out_msg.OriginalRequestorMachId := TBEs[address].Requestor;
-	}
+        if (is_valid_ptr(tbe_ptr)) {
+          out_msg.OriginalRequestorMachId := tbe.Requestor;
+        }
         out_msg.DataBlk := in_msg.DataBlk;
         out_msg.MessageSize := in_msg.MessageSize;
         //out_msg.Prefetch := false;
@@ -543,8 +556,8 @@
       out_msg.Address := address;
       out_msg.Sender := machineID;
       out_msg.SenderMachine := MachineType:Directory;
-      if (TBEs.isPresent(address)) {
-        out_msg.Destination.add(TBEs[address].Requestor);
+      if (is_valid_ptr(tbe_ptr)) {
+        out_msg.Destination.add(tbe.Requestor);
       }
       out_msg.DataBlk := in_msg.DataBlk;
       out_msg.Acks := getDirectoryEntry(address).Sharers.count();  // for dma requests
@@ -561,23 +574,25 @@
   }
 
   action(l_writeDMADataToMemoryFromTBE, "\ll", desc="Write data from a DMA_WRITE to memory") {
-    getDirectoryEntry(address).DataBlk.copyPartial(TBEs[address].DataBlk, 
-					   addressOffset(TBEs[address].PhysicalAddress), 
-					   TBEs[address].Len);
+    getDirectoryEntry(address).DataBlk.copyPartial(tbe.DataBlk, 
+                      addressOffset(tbe.PhysicalAddress), 
+                      tbe.Len);
   }
 
   action(v_allocateTBE, "v", desc="Allocate TBE entry") {
     peek (requestQueue_in, RequestMsg) {
       TBEs.allocate(address);
-      TBEs[address].PhysicalAddress := in_msg.Address;
-      TBEs[address].Len := in_msg.Len;
-      TBEs[address].DataBlk := in_msg.DataBlk;
-      TBEs[address].Requestor := in_msg.Requestor;
+      set_tbe(TBEs[address]);
+      tbe.PhysicalAddress := in_msg.Address;
+      tbe.Len := in_msg.Len;
+      tbe.DataBlk := in_msg.DataBlk;
+      tbe.Requestor := in_msg.Requestor;
     }
   }
 
   action(w_deallocateTBE, "w", desc="Deallocate TBE entry") {
     TBEs.deallocate(address);
+    unset_tbe();
   }
 
 
diff --git a/src/mem/protocol/MOESI_CMP_directory-dma.sm b/src/mem/protocol/MOESI_CMP_directory-dma.sm
--- a/src/mem/protocol/MOESI_CMP_directory-dma.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm
@@ -51,10 +51,13 @@
   TBETable TBEs, template_hack="<DMA_TBE>";
   State cur_state;
 
-  State getState(Address addr) {
+  void set_tbe(TBE b);
+  void unset_tbe();
+
+  State getState(TBE tbe, Address addr) {
     return cur_state;
   }
-  void setState(Address addr, State state) {
+  void setState(TBE tbe, Address addr, State state) {
   cur_state := state;
   }
 
@@ -82,6 +85,7 @@
   in_port(dmaRequestQueue_in, SequencerMsg, mandatoryQueue, desc="...") {
     if (dmaRequestQueue_in.isReady()) {
       peek(dmaRequestQueue_in, SequencerMsg) {
+        set_tbe(TBEs[in_msg.LineAddress]);
         if (in_msg.Type == SequencerRequestType:LD ) {
           trigger(Event:ReadRequest, in_msg.LineAddress);
         } else if (in_msg.Type == SequencerRequestType:ST) {
@@ -96,6 +100,7 @@
   in_port(dmaResponseQueue_in, ResponseMsg, responseFromDir, desc="...") {
     if (dmaResponseQueue_in.isReady()) {
       peek( dmaResponseQueue_in, ResponseMsg) {
+        set_tbe(TBEs[makeLineAddress(in_msg.Address)]);
         if (in_msg.Type == CoherenceResponseType:DMA_ACK) {
           trigger(Event:DMA_Ack, makeLineAddress(in_msg.Address));
         } else if (in_msg.Type == CoherenceResponseType:DATA_EXCLUSIVE ||
@@ -114,6 +119,7 @@
   in_port(triggerQueue_in, TriggerMsg, triggerQueue) {
     if (triggerQueue_in.isReady()) {
       peek(triggerQueue_in, TriggerMsg) {
+        set_tbe(TBEs[in_msg.Address]);
         if (in_msg.Type == TriggerType:ALL_ACKS) {
           trigger(Event:All_Acks, in_msg.Address);
         } else {
@@ -156,7 +162,7 @@
   }
 
   action(o_checkForCompletion, "o", desc="Check if we have received all the messages required for completion") {
-    if (TBEs[address].NumAcks == 0) {
+    if (tbe.NumAcks == 0) {
       enqueue(triggerQueue_out, TriggerMsg) {
         out_msg.Address := address;
         out_msg.Type := TriggerType:ALL_ACKS;
@@ -166,7 +172,7 @@
 
   action(u_updateAckCount, "u", desc="Update ack count") {
     peek(dmaResponseQueue_in, ResponseMsg) {
-      TBEs[address].NumAcks := TBEs[address].NumAcks - in_msg.Acks;
+      tbe.NumAcks := tbe.NumAcks - in_msg.Acks;
     }
   }
 
@@ -193,20 +199,22 @@
 
   action(t_updateTBEData, "t", desc="Update TBE Data") {
     peek(dmaResponseQueue_in, ResponseMsg) {
-      TBEs[address].DataBlk := in_msg.DataBlk;
+      tbe.DataBlk := in_msg.DataBlk;
     }
   }
 
   action(d_dataCallbackFromTBE, "/d", desc="data callback with data from TBE") {
-    dma_sequencer.dataCallback(TBEs[address].DataBlk);
+    dma_sequencer.dataCallback(tbe.DataBlk);
   }
 
   action(v_allocateTBE, "v", desc="Allocate TBE entry") {
     TBEs.allocate(address);
+    set_tbe(TBEs[address]);
   }
 
   action(w_deallocateTBE, "w", desc="Deallocate TBE entry") {
     TBEs.deallocate(address);
+    unset_tbe();
   }
 
   action(z_stall, "z", desc="dma is busy..stall") {