diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/sinic.hh
--- a/src/dev/sinic.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/sinic.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -349,6 +349,6 @@
     virtual void sendDone() { dev->transferDone(); }
 };
 
-/* namespace Sinic */ }
+} // namespace Sinic
 
 #endif // __DEV_SINIC_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/sinic.cc
--- a/src/dev/sinic.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/sinic.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -1714,7 +1714,7 @@
 
 }
 
-/* namespace Sinic */ }
+} // namespace Sinic
 
 Sinic::Device *
 SinicParams::create()
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/sinicreg.hh
--- a/src/dev/sinicreg.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/sinicreg.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -178,7 +178,7 @@
     const char *name;
 };
 
-/* namespace Regs */ }
+} // namespace Regs
 
 inline const Regs::Info&
 regInfo(Addr daddr)
@@ -234,6 +234,6 @@
     return true;
 }
 
-/* namespace Sinic */ }
+} // namespace Sinic
 
 #endif // __DEV_SINICREG_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/cmos.hh
--- a/src/dev/x86/cmos.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/cmos.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -84,6 +84,6 @@
     Tick write(PacketPtr pkt);
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_CMOS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/i8042.hh
--- a/src/dev/x86/i8042.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/i8042.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -254,6 +254,6 @@
     Tick write(PacketPtr pkt);
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_I8042_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/i82094aa.hh
--- a/src/dev/x86/i82094aa.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/i82094aa.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -132,6 +132,6 @@
     void registerLocalApic(int id, Interrupts *localApic);
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/i8237.hh
--- a/src/dev/x86/i8237.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/i8237.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -61,6 +61,6 @@
     Tick write(PacketPtr pkt);
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_I8237_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/i8254.hh
--- a/src/dev/x86/i8254.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/i8254.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -111,6 +111,6 @@
     }
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/i8259.hh
--- a/src/dev/x86/i8259.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/i8259.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -110,6 +110,6 @@
     int getVector();
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_I8259_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/intdev.hh
--- a/src/dev/x86/intdev.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/intdev.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -234,6 +234,6 @@
     }
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_INTDEV_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/x86/speaker.hh
--- a/src/dev/x86/speaker.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/x86/speaker.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -74,6 +74,6 @@
     Tick write(PacketPtr pkt);
 };
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif //__DEV_X86_SPEAKER_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/kern/kernel_stats.hh
--- a/src/kern/kernel_stats.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/kern/kernel_stats.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -85,6 +85,6 @@
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 };
 
-/* end namespace Kernel */ }
+} // namespace Kernel
 
 #endif // __KERNEL_STATS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/kern/kernel_stats.cc
--- a/src/kern/kernel_stats.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/kern/kernel_stats.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -139,4 +139,4 @@
     UNSERIALIZE_SCALAR(iplLastTick);
 }
 
-/* end namespace Kernel */ }
+} // namespace Kernel
diff -r 42f343470ee3 -r d5b8f58ad5cb src/mem/ruby/common/Address.hh
--- a/src/mem/ruby/common/Address.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/mem/ruby/common/Address.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -277,7 +277,7 @@
         return (size_t)s.getAddress();
     }
 };
-/* namespace __hash_namespace */ }
+} // namespace __hash_namespace
 
 namespace std {
 template <> struct equal_to<Address>
@@ -288,6 +288,6 @@
         return s1 == s2;
     }
 };
-/* namespace std */ }
+} // namespace std
 
 #endif // __MEM_RUBY_COMMON_ADDRESS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/core.hh
--- a/src/sim/core.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/core.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -55,7 +55,7 @@
 extern double kHz;
 extern double MHz;
 extern double GHZ;
-/* namespace Float */ }
+} // namespace Float
 
 namespace Int {
 extern Tick s;
@@ -63,8 +63,8 @@
 extern Tick us;
 extern Tick ns;
 extern Tick ps;
-/* namespace Int */ }
-/* namespace SimClock */ }
+} // namespace Int
+} // namespace SimClock
 
 void setClockFrequency(Tick ticksPerSecond);
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/core.cc
--- a/src/sim/core.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/core.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -55,7 +55,7 @@
 double kHz;
 double MHz;
 double GHZ;
-/* namespace Float */ }
+} // namespace Float
 
 namespace Int {
 Tick s;
@@ -63,9 +63,9 @@
 Tick us;
 Tick ns;
 Tick ps;
-/* namespace Float */ }
+} // namespace Float
 
-/* namespace SimClock */ }
+} // namespace SimClock
 
 void
 setClockFrequency(Tick ticksPerSecond)
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/insttracer.hh
--- a/src/sim/insttracer.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/insttracer.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -170,6 +170,6 @@
 
 
 
-}; // namespace Trace
+} // namespace Trace
 
 #endif // __INSTRECORD_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/pseudo_inst.hh
--- a/src/sim/pseudo_inst.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/pseudo_inst.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -64,4 +64,4 @@
 void debugbreak(ThreadContext *tc);
 void switchcpu(ThreadContext *tc);
 
-/* namespace PseudoInst */ }
+} // namespace PseudoInst
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/pseudo_inst.cc
--- a/src/sim/pseudo_inst.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/pseudo_inst.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -326,4 +326,4 @@
     exitSimLoop("switchcpu");
 }
 
-/* namespace PseudoInst */ }
+} // namespace PseudoInst
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/stat_control.hh
--- a/src/sim/stat_control.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/stat_control.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -36,6 +36,6 @@
 void initSimStats();
 void StatEvent(bool dump, bool reset, Tick when = curTick, Tick repeat = 0);
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __SIM_STAT_CONTROL_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/sim/stat_control.cc
--- a/src/sim/stat_control.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/sim/stat_control.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -201,4 +201,4 @@
     mainEventQueue.schedule(event, when);
 }
 
-/* namespace Stats */ }
+} // namespace Stats
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/trace.hh
--- a/src/base/trace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/trace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -60,7 +60,7 @@
              CPRINTF_DECLARATION);
 void dump(Tick when, const std::string &name, const void *data, int len);
 
-/* namespace Trace */ }
+} // namespace Trace
 
 // This silly little class allows us to wrap a string in a functor
 // object so that we can give a name() that DPRINTF will like
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/trace.cc
--- a/src/base/trace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/trace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -188,7 +188,7 @@
     }
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 
 // add a set of functions that can easily be invoked from gdb
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/varargs.hh
--- a/src/base/varargs.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/varargs.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -303,6 +303,6 @@
     }
 };
 
-/* end namespace VarArgs */ }
+} // namespace VarArgs
 
 #endif /* __BASE_VARARGS_HH__ */
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/exetrace.hh
--- a/src/cpu/exetrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/exetrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -86,6 +86,6 @@
     }
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
 #endif // __CPU_EXETRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/exetrace.cc
--- a/src/cpu/exetrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/exetrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -155,7 +155,7 @@
     }
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/inorder/inorder_trace.hh
--- a/src/cpu/inorder/inorder_trace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/inorder/inorder_trace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -93,6 +93,6 @@
             const StaticInstPtr macroStaticInst = NULL);
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
 #endif // __CPU_INORDER_INORDER_TRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/inorder/inorder_trace.cc
--- a/src/cpu/inorder/inorder_trace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/inorder/inorder_trace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -81,7 +81,7 @@
     return new InOrderTraceRecord(ThePipeline::NumStages, true, tc, _pc);
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/inteltrace.hh
--- a/src/cpu/inteltrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/inteltrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -82,6 +82,6 @@
     }
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
 #endif // __CPU_INTELTRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/inteltrace.cc
--- a/src/cpu/inteltrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/inteltrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -57,7 +57,7 @@
     outs << endl;
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/legiontrace.hh
--- a/src/cpu/legiontrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/legiontrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -76,6 +76,6 @@
     }
 };
 
-/* namespace Trace */ }
+} // namespace Trace
 
 #endif // __CPU_LEGIONTRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/legiontrace.cc
--- a/src/cpu/legiontrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/legiontrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -587,7 +587,7 @@
     } // if not microop
 }
 
-/* namespace Trace */ }
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/nativetrace.hh
--- a/src/cpu/nativetrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/nativetrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -119,6 +119,6 @@
     check(NativeTraceRecord *record) = 0;
 };
 
-} /* namespace Trace */
+} // namespace Trace
 
 #endif // __CPU_NATIVETRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/cpu/nativetrace.cc
--- a/src/cpu/nativetrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/cpu/nativetrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -62,4 +62,4 @@
         parent->check(this);
 }
 
-} /* namespace Trace */
+} // namespace Trace
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/copy_engine_defs.hh
--- a/src/dev/copy_engine_defs.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/copy_engine_defs.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -220,6 +220,6 @@
 
 };
 
-} //namespace CopyEngineReg
+} // namespace CopyEngineReg
 
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/dev/i8254xGBe_defs.hh
--- a/src/dev/i8254xGBe_defs.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/dev/i8254xGBe_defs.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -851,4 +851,4 @@
         UNSERIALIZE_SCALAR(sw_fw_sync);
     }
 };
-} // iGbReg namespace
+} // namespace iGbReg
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/integer.hh
--- a/src/arch/power/insts/integer.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/integer.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -171,6 +171,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_INTEGER_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/mem.hh
--- a/src/arch/power/insts/mem.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/mem.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -86,6 +86,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_MEM_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/misc.hh
--- a/src/arch/power/insts/misc.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/misc.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -52,6 +52,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_MISC_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/static_inst.hh
--- a/src/arch/power/insts/static_inst.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/static_inst.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -71,6 +71,6 @@
     }
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_STATICINST_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/isa.hh
--- a/src/arch/power/isa.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/isa.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -110,6 +110,6 @@
     }
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_ISA_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/isa_traits.hh
--- a/src/arch/power/isa_traits.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/isa_traits.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -38,7 +38,7 @@
 #include "arch/power/types.hh"
 #include "base/types.hh"
 
-namespace BigEndianGuest {};
+namespace BigEndianGuest {}
 
 class StaticInstPtr;
 
@@ -73,6 +73,6 @@
 // Memory accesses can be unaligned
 const bool HasUnalignedMemAcc = true;
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_ISA_TRAITS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/locked_mem.hh
--- a/src/arch/power/locked_mem.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/locked_mem.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -59,6 +59,6 @@
     return true;
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_LOCKED_MEM_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/microcode_rom.hh
--- a/src/arch/power/microcode_rom.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/microcode_rom.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -40,6 +40,6 @@
 
 using ::MicrocodeRom;
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_MICROCODE_ROM_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/miscregs.hh
--- a/src/arch/power/miscregs.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/miscregs.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -95,6 +95,6 @@
     Bitfield<2,1> rn;
 EndBitUnion(Fpscr)
 
-}; // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_MISCREGS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/mmaped_ipr.hh
--- a/src/arch/power/mmaped_ipr.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/mmaped_ipr.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -61,6 +61,6 @@
     panic("No implementation for handleIprWrite in POWER\n");
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_MMAPED_IPR_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/pagetable.hh
--- a/src/arch/power/pagetable.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/pagetable.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -152,7 +152,7 @@
     void unserialize(Checkpoint *cp, const std::string &section);
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_PAGETABLE_H__
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/pagetable.cc
--- a/src/arch/power/pagetable.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/pagetable.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -79,4 +79,4 @@
     UNSERIALIZE_SCALAR(OffsetMask);
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/predecoder.hh
--- a/src/arch/power/predecoder.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/predecoder.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -120,6 +120,6 @@
     }
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_PREDECODER_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/registers.hh
--- a/src/arch/power/registers.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/registers.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -101,6 +101,6 @@
     INTREG_RSV_ADDR
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_REGISTERS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/remote_gdb.hh
--- a/src/arch/power/remote_gdb.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/remote_gdb.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -79,6 +79,6 @@
     }
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif /* __ARCH_POWER_REMOTE_GDB_H__ */
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/stacktrace.hh
--- a/src/arch/power/stacktrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/stacktrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -143,6 +143,6 @@
     return true;
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_STACKTRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/tlb.hh
--- a/src/arch/power/tlb.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/tlb.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -167,6 +167,6 @@
     void regStats();
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_TLB_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/types.hh
--- a/src/arch/power/types.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/types.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -101,6 +101,6 @@
     };
 };
 
-} // __hash_namespace namespace
+} // namespace __hash_namespace
 
 #endif // __ARCH_POWER_TYPES_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/utility.hh
--- a/src/arch/power/utility.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/utility.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -78,6 +78,6 @@
     pc.advance();
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_UTILITY_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/utility.cc
--- a/src/arch/power/utility.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/utility.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -62,4 +62,4 @@
 }
 
 
-} // PowerISA namespace
+} // namespace PowerISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/vtophys.hh
--- a/src/arch/power/vtophys.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/vtophys.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -51,7 +51,7 @@
     return (a & PteMask) << PteShift;
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_VTOPHYS_HH__
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/faults.hh
--- a/src/arch/sparc/faults.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/faults.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -302,6 +302,6 @@
 }
 
 
-} // SparcISA namespace
+} // namespace SparcISA
 
 #endif // __SPARC_FAULTS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/kernel_stats.hh
--- a/src/arch/sparc/kernel_stats.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/kernel_stats.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -51,7 +51,7 @@
     {}
 };
 
-} /* end namespace AlphaISA::Kernel */
-} /* end namespace AlphaISA */
+} // namespace AlphaISA::Kernel
+} // namespace AlphaISA
 
 #endif // __ARCH_SPARC_KERNEL_STATS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/nativetrace.hh
--- a/src/arch/sparc/nativetrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/nativetrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -47,6 +47,6 @@
     void check(NativeTraceRecord *record);
 };
 
-} /* namespace Trace */
+} // namespace Trace
 
 #endif // __CPU_NATIVETRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/nativetrace.cc
--- a/src/arch/sparc/nativetrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/nativetrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -87,7 +87,7 @@
     checkReg("ccr", regVal, realRegVal);
 }
 
-} /* namespace Trace */
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/tlb.cc
--- a/src/arch/sparc/tlb.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/tlb.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -1408,7 +1408,7 @@
     UNSERIALIZE_SCALAR(sfar);
 }
 
-/* end namespace SparcISA */ }
+} // namespace SparcISA
 
 SparcISA::TLB *
 SparcTLBParams::create()
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/sparc/vtophys.cc
--- a/src/arch/sparc/vtophys.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/sparc/vtophys.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -129,4 +129,4 @@
     return pte.translate(addr);
 }
 
-} /* namespace SparcISA */
+} // namespace SparcISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/cpuid.cc
--- a/src/arch/x86/cpuid.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/cpuid.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -158,4 +158,4 @@
         }
         return true;
     }
-} //namespace X86ISA
+} // namespace X86ISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/nativetrace.hh
--- a/src/arch/x86/nativetrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/nativetrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -85,6 +85,6 @@
     void check(NativeTraceRecord *record);
 };
 
-} /* namespace Trace */
+} // namespace Trace
 
 #endif // __ARCH_X86_NATIVETRACE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/nativetrace.cc
--- a/src/arch/x86/nativetrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/nativetrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -186,7 +186,7 @@
     checkXMM(15, mState.xmm, nState.xmm);
 }
 
-} /* namespace Trace */
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/registers.hh
--- a/src/arch/x86/registers.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/registers.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -111,6 +111,6 @@
 
 typedef uint16_t RegIndex;
 
-}; // namespace X86ISA
+} // namespace X86ISA
 
 #endif // __ARCH_X86_REGFILE_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/tlb.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -737,7 +737,7 @@
 {
 }
 
-/* end namespace X86ISA */ }
+} // namespace X86ISA
 
 X86ISA::TLB *
 X86TLBParams::create()
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/x86/utility.cc
--- a/src/arch/x86/utility.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/x86/utility.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -243,4 +243,4 @@
 }
 
 
-} //namespace X86_ISA
+} // namespace X86_ISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/cprintf.hh
--- a/src/base/cprintf.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/cprintf.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -125,7 +125,7 @@
     void end_args();
 };
 
-/* end namespace cp */ }
+} // namespace cp
 
 typedef VarArgs::List<cp::Print> CPrintfArgsList;
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/cprintf.cc
--- a/src/base/cprintf.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/cprintf.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -291,4 +291,4 @@
     stream.precision(saved_precision);
 }
 
-/* end namespace cp */ }
+} // namespace cp
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/hashmap.hh
--- a/src/base/hashmap.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/hashmap.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -92,6 +92,6 @@
             return (__stl_hash_string(r.first.c_str())) ^ r.second;
         }
     };
-/* namespace __hash_namespace */ }
+} // namespace __hash_namespace
 
 #endif // __HASHMAP_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/inet.hh
--- a/src/base/inet.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/inet.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -472,6 +472,6 @@
 
 int hsplit(const EthPacketPtr &ptr);
 
-/* namespace Net */ }
+} // namespace Net
 
 #endif // __BASE_INET_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/inet.cc
--- a/src/base/inet.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/inet.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -297,4 +297,4 @@
 }
 
 
-/* namespace Net */ }
+} // namespace Net
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/mysql.hh
--- a/src/base/mysql.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/mysql.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -420,6 +420,6 @@
 }
 #endif
 
-/* namespace MySQL */ }
+} // namespace MySQL
 
 #endif // __BASE_MYSQL_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/mysql.cc
--- a/src/base/mysql.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/mysql.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -109,4 +109,4 @@
 }
 
 
-/* namespace MySQL */ }
+} // namespace MySQL
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/statistics.hh
--- a/src/base/statistics.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/statistics.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -2784,6 +2784,6 @@
 
 std::list<Info *> &statsList();
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATISTICS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/statistics.cc
--- a/src/base/statistics.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/statistics.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -377,4 +377,4 @@
     resetQueue.add(cb);
 }
 
-/* namespace Stats */ }
+} // namespace Stats
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/info.hh
--- a/src/base/stats/info.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/info.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -232,6 +232,6 @@
 };
 
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_INFO_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/mysql.hh
--- a/src/base/stats/mysql.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/mysql.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -179,6 +179,6 @@
 }
 #endif
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_MYSQL_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/mysql.cc
--- a/src/base/stats/mysql.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/mysql.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -836,4 +836,4 @@
     return true;
 }
 
-/* end namespace Stats */ }
+} // namespace Stats
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/mysql_run.hh
--- a/src/base/stats/mysql_run.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/mysql_run.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -62,6 +62,6 @@
     uint16_t run() const { return run_id; }
 };
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_MYSQL_RUN_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/output.hh
--- a/src/base/stats/output.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/output.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -44,6 +44,6 @@
     virtual bool valid() const = 0;
 };
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_OUTPUT_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/output.cc
--- a/src/base/stats/output.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/output.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -63,7 +63,7 @@
     }
 }
 
-/* namespace Stats */ }
+} // namespace Stats
 
 void
 debugDumpStats()
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/text.hh
--- a/src/base/stats/text.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/text.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -75,6 +75,6 @@
 
 bool initText(const std::string &filename, bool desc);
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_TEXT_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/text.cc
--- a/src/base/stats/text.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/text.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -594,4 +594,4 @@
     return true;
 }
 
-/* namespace Stats */ }
+} // namespace Stats
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/types.hh
--- a/src/base/stats/types.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/types.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -53,6 +53,6 @@
 typedef unsigned int size_type;
 typedef unsigned int off_type;
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_TYPES_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/visit.hh
--- a/src/base/stats/visit.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/visit.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -55,6 +55,6 @@
     virtual void visit(const FormulaInfo &info) = 0;
 };
 
-/* namespace Stats */ }
+} // namespace Stats
 
 #endif // __BASE_STATS_VISIT_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stats/visit.cc
--- a/src/base/stats/visit.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stats/visit.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -38,4 +38,4 @@
 Visit::~Visit()
 {}
 
-/* namespace Stats */ }
+} // namespace Stats
diff -r 42f343470ee3 -r d5b8f58ad5cb src/base/stl_helpers.hh
--- a/src/base/stl_helpers.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/base/stl_helpers.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -92,7 +92,7 @@
     return out;
 }
 
-/* namespace stl_helpers */ }
-/* namespace m5 */ }
+} // namespace stl_helpers
+} // namespace m5
 
 #endif // __BASE_STL_HELPERS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/nativetrace.cc
--- a/src/arch/arm/nativetrace.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/nativetrace.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -192,7 +192,7 @@
     }
 }
 
-} /* namespace Trace */
+} // namespace Trace
 
 ////////////////////////////////////////////////////////////////////////
 //
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/tlb.hh
--- a/src/arch/arm/tlb.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/tlb.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -239,6 +239,6 @@
     inline void invalidateMiscReg() { miscRegValid = false; }
 };
 
-/* namespace ArmISA */ }
+} // namespace ArmISA
 
 #endif // __ARCH_ARM_TLB_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/mips/dsp.hh
--- a/src/arch/mips/dsp.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/mips/dsp.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -199,6 +199,6 @@
 void writeDSPControl(uint32_t *dspctl, uint32_t value, uint32_t mask);
 uint32_t readDSPControl(uint32_t *dspctl, uint32_t mask);
 
-} /* namespace MipsISA */
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_DSP_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/mips/faults.hh
--- a/src/arch/mips/faults.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/mips/faults.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -596,6 +596,6 @@
             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 };
 
-} // MipsISA namespace
+} // namespace MipsISA
 
 #endif // __MIPS_FAULTS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/mips/isa_traits.hh
--- a/src/arch/mips/isa_traits.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/mips/isa_traits.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -39,7 +39,7 @@
 #include "base/types.hh"
 #include "config/full_system.hh"
 
-namespace LittleEndianGuest {};
+namespace LittleEndianGuest {}
 
 class StaticInstPtr;
 
@@ -164,6 +164,6 @@
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;
 
-};
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_ISA_TRAITS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/mips/kernel_stats.hh
--- a/src/arch/mips/kernel_stats.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/mips/kernel_stats.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -48,7 +48,7 @@
 };
 
 
-} /* end namespace MipsISA::Kernel */
-} /* end namespace MipsISA */
+} // namespace MipsISA::Kernel
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_KERNEL_STATS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/mips/linux/threadinfo.hh
--- a/src/arch/mips/linux/threadinfo.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/mips/linux/threadinfo.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -148,6 +148,6 @@
     }
 };
 
-/* namespace Linux */ }
+} // namespace Linux
 
 #endif // __ARCH_MIPS_LINUX_LINUX_THREADINFO_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/faults.hh
--- a/src/arch/power/faults.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/faults.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -98,6 +98,6 @@
     return new MachineCheckFault();
 }
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif // __ARCH_POWER_FAULTS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/branch.hh
--- a/src/arch/power/insts/branch.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/branch.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -236,6 +236,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_BRANCH_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/condition.hh
--- a/src/arch/power/insts/condition.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/condition.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -81,6 +81,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_CONDITION_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/power/insts/floating.hh
--- a/src/arch/power/insts/floating.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/power/insts/floating.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -148,6 +148,6 @@
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
-} // PowerISA namespace
+} // namespace PowerISA
 
 #endif //__ARCH_POWER_INSTS_FLOATING_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/alpha/mt.hh
--- a/src/arch/alpha/mt.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/alpha/mt.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -66,6 +66,6 @@
     return 0;
 }
 
-}//namespace AlphaISA
+} // namespace AlphaISA
 
 #endif
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/alpha/pagetable.cc
--- a/src/arch/alpha/pagetable.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/alpha/pagetable.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -61,4 +61,4 @@
     UNSERIALIZE_SCALAR(valid);
 }
 
-} //namespace AlphaISA
+} // namespace AlphaISA
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/alpha/tlb.cc
--- a/src/arch/alpha/tlb.cc	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/alpha/tlb.cc	Wed Dec 22 17:25:03 2010 -0800
@@ -595,7 +595,7 @@
     translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
 }
 
-/* end namespace AlphaISA */ }
+} // namespace AlphaISA
 
 AlphaISA::TLB *
 AlphaTLBParams::create()
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/faults.hh
--- a/src/arch/arm/faults.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/faults.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -246,6 +246,6 @@
     return new Reset();
 }
 
-} // ArmISA namespace
+} // namespace ArmISA
 
 #endif // __ARM_FAULTS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/isa_traits.hh
--- a/src/arch/arm/isa_traits.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/isa_traits.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -48,7 +48,7 @@
 #include "arch/arm/types.hh"
 #include "base/types.hh"
 
-namespace LittleEndianGuest {};
+namespace LittleEndianGuest {}
 
 #define TARGET_ARM
 
@@ -123,7 +123,7 @@
         INT_FIQ,
         NumInterruptTypes
     };
-};
+} // namespace ArmISA
 
 using namespace ArmISA;
 
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/kernel_stats.hh
--- a/src/arch/arm/kernel_stats.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/kernel_stats.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -51,7 +51,7 @@
     {}
 };
 
-} /* end namespace ArmISA::Kernel */
-} /* end namespace ArmISA */
+} // namespace ArmISA::Kernel
+} // namespace ArmISA
 
 #endif // __ARCH_ARM_KERNEL_STATS_HH__
diff -r 42f343470ee3 -r d5b8f58ad5cb src/arch/arm/nativetrace.hh
--- a/src/arch/arm/nativetrace.hh	Tue Dec 21 22:57:29 2010 -0800
+++ b/src/arch/arm/nativetrace.hh	Wed Dec 22 17:25:03 2010 -0800
@@ -107,6 +107,6 @@
     void check(NativeTraceRecord *record);
 };
 
-} /* namespace Trace */
+} // namespace Trace
 
 #endif // __ARCH_ARM_NATIVETRACE_HH__