# Node ID 9da183119590022b8413dcd0b948bb7aacf946c6
# Parent  7bb8375949aaefcf07ffe85d4a24176392b37124
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -1857,6 +1857,24 @@
 }
 
 void
+DRAMCtrl::Rank::computeStats()
+{
+    DPRINTF(DRAM,"Computing final stats\n");
+
+    // Force DRAM power to update counters based on time spent in
+    // current state up to curTick()
+    cmdList.push_back(Command(MemCommand::NOP, 0, curTick()));
+
+    // Update the stats
+    updatePowerStats();
+
+    // final update of power state times
+    pwrStateTime[pwrState] += (curTick() - pwrStateTick);
+    pwrStateTick = curTick();
+
+}
+
+void
 DRAMCtrl::Rank::regStats()
 {
     using namespace Stats;
@@ -1906,6 +1924,8 @@
     averagePower
         .name(name() + ".averagePower")
         .desc("Core power per rank (mW)");
+
+    registerDumpCallback(new RankDumpCallback(this));
 }
 void
 DRAMCtrl::regStats()
diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -56,6 +56,7 @@
 #include <string>
 #include <unordered_set>
 
+#include "base/callback.hh"
 #include "base/statistics.hh"
 #include "enums/AddrMap.hh"
 #include "enums/MemSched.hh"
@@ -409,6 +410,11 @@
          */
         void regStats();
 
+        /**
+         * Computes stats just prior to dump event
+         */
+        void computeStats();
+
         void processActivateEvent();
         EventWrapper<Rank, &Rank::processActivateEvent>
         activateEvent;
@@ -427,6 +433,18 @@
 
     };
 
+    // define the process to compute stats on simulation exit
+    // defined per rank as the per rank stats are based on state
+    // transition and periodically updated, requiring re-sync at
+    // exit.
+    class RankDumpCallback : public Callback
+    {
+        Rank *ranks;
+      public:
+        RankDumpCallback(Rank *r) : ranks(r) {}
+        virtual void process() { ranks->computeStats(); };
+    };
+
     /**
      * A burst helper helps organize and manage a packet that is larger than
      * the DRAM burst size. A system packet that is larger than the burst size