diff -r 1ede1b60b318 -r 3228be61f0ce src/cpu/o3/decode_impl.hh
--- a/src/cpu/o3/decode_impl.hh	Tue Sep 20 15:51:24 2016 +0100
+++ b/src/cpu/o3/decode_impl.hh	Wed Sep 21 15:53:20 2016 +0100
@@ -209,7 +209,8 @@
 DefaultDecode<Impl>::isDrained() const
 {
     for (ThreadID tid = 0; tid < numThreads; ++tid) {
-        if (!insts[tid].empty() || !skidBuffer[tid].empty())
+        if (!insts[tid].empty() || !skidBuffer[tid].empty() ||
+                (decodeStatus[tid] != Running && decodeStatus[tid] != Idle))
             return false;
     }
     return true;
diff -r 1ede1b60b318 -r 3228be61f0ce src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh	Tue Sep 20 15:51:24 2016 +0100
+++ b/src/cpu/o3/fetch_impl.hh	Wed Sep 21 15:53:20 2016 +0100
@@ -424,8 +424,10 @@
 void
 DefaultFetch<Impl>::drainResume()
 {
-    for (ThreadID i = 0; i < numThreads; ++i)
+    for (ThreadID i = 0; i < numThreads; ++i) {
+        stalls[i].decode = false;
         stalls[i].drain = false;
+    }
 }
 
 template <class Impl>
diff -r 1ede1b60b318 -r 3228be61f0ce src/cpu/o3/iew_impl.hh
--- a/src/cpu/o3/iew_impl.hh	Tue Sep 20 15:51:24 2016 +0100
+++ b/src/cpu/o3/iew_impl.hh	Wed Sep 21 15:53:20 2016 +0100
@@ -391,6 +391,7 @@
             DPRINTF(Drain, "%i: Skid buffer not empty.\n", tid);
             drained = false;
         }
+        drained = drained && dispatchStatus[tid] == Running;
     }
 
     // Also check the FU pool as instructions are "stored" in FU
diff -r 1ede1b60b318 -r 3228be61f0ce src/cpu/o3/rename_impl.hh
--- a/src/cpu/o3/rename_impl.hh	Tue Sep 20 15:51:24 2016 +0100
+++ b/src/cpu/o3/rename_impl.hh	Wed Sep 21 15:53:20 2016 +0100
@@ -304,7 +304,8 @@
         if (instsInProgress[tid] != 0 ||
             !historyBuffer[tid].empty() ||
             !skidBuffer[tid].empty() ||
-            !insts[tid].empty())
+            !insts[tid].empty() ||
+            (renameStatus[tid] != Idle && renameStatus[tid] != Running))
             return false;
     }
     return true;