diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/common/cli_parser.hh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/common/cli_parser.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#ifndef __CLI_PARSER_HH__
+#define __CLI_PARSER_HH__
+
+#include <cassert>
+#include <string>
+#include <vector>
+
+class CliParser
+{
+  private:
+    int argc;
+    char** argv;
+
+    bool parsed;
+
+    uint64_t memoryOffset;
+    uint64_t simulationEnd;
+    bool verboseFlag;
+    std::vector<std::string> debugFlags;
+    std::string configFile;
+
+    void usage(const std::string& prog_name);
+  public:
+
+    CliParser() : parsed(false) {}
+
+    void parse(int argc, char** argv);
+
+    uint64_t getMemoryOffset()  { assert(parsed); return memoryOffset; }
+    uint64_t getSimulationEnd() { assert(parsed); return simulationEnd; }
+    bool getVerboseFlag()       { assert(parsed); return verboseFlag; }
+    std::string getConfigFile() { assert(parsed); return configFile; }
+    std::string getDebugFlags();
+};
+
+#endif
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/common/cli_parser.cc
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/common/cli_parser.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#include <iostream>
+#include <sstream>
+
+#include "cli_parser.hh"
+#include "sim/cxx_manager.hh"
+
+void
+CliParser::usage(const std::string& prog_name)
+{
+    std::cerr
+      << "Usage: " << prog_name
+      << (" <config_file.ini> [ <option> ]\n\n"
+          "OPTIONS:\n"
+
+          "    -o <offset>                  -- set memory offset\n"
+          "    -d <flag>                    -- set a gem5 debug flag\n"
+          "                                    (-<flag> clears a flag)\n"
+          "    -v                           -- verbose output\n"
+          "    -e <ticks>                   -- end of simulation after a \n"
+          "                                    given number of ticks\n"
+          "\n");
+    std::exit(EXIT_FAILURE);
+}
+
+void
+CliParser::parse(int argc, char** argv)
+{
+    std::string prog_name(argv[0]);
+
+    unsigned int arg_ptr = 1;
+
+    if (argc == 1) {
+        usage(prog_name);
+    }
+
+    configFile = std::string(argv[arg_ptr]);
+    arg_ptr++;
+
+    // default values
+    verboseFlag = false;
+    simulationEnd = 0;
+    memoryOffset = 0;
+
+    try {
+        while (arg_ptr < argc) {
+            std::string option(argv[arg_ptr]);
+            arg_ptr++;
+            unsigned num_args = argc - arg_ptr;
+
+            if (option == "-d") {
+                if (num_args < 1) {
+                    usage(prog_name);
+                }
+                std::string flag(argv[arg_ptr]);
+                arg_ptr++;
+                debugFlags.push_back(flag);
+            } else if (option == "-e") {
+                if (num_args < 1) {
+                    usage(prog_name);
+                }
+                std::istringstream(argv[arg_ptr]) >> simulationEnd;
+                arg_ptr++;
+            } else if (option == "-v") {
+                verboseFlag = true;
+            } else if (option == "-o") {
+                if (num_args < 1) {
+                    usage(prog_name);
+                }
+                std::istringstream(argv[arg_ptr]) >> memoryOffset;
+                arg_ptr++;
+                /* code */
+            } else {
+                usage(prog_name);
+            }
+        }
+    } catch (CxxConfigManager::Exception &e) {
+        std::cerr << e.name << ": " << e.message << "\n";
+        std::exit(EXIT_FAILURE);
+    }
+
+    parsed = true;
+}
+
+std::string
+CliParser::getDebugFlags()
+{
+    std::stringstream ss;
+    for (auto& flag : debugFlags) {
+        ss << flag << ' ';
+    }
+    return ss.str();
+}
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/common/report_handler.hh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/common/report_handler.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Matthias Jung
+ *          Christian Menard
+ */
+
+#ifndef __REPORT_HANDLER_HH__
+#define __REPORT_HANDLER_HH__
+
+void reportHandler(const sc_core::sc_report &report,
+                   const sc_core::sc_actions &actions);
+
+#endif
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/common/report_handler.cc
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/common/report_handler.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#include <iostream>
+#include <systemc>
+
+#include <sim/simulate.hh>
+
+#include "report_handler.hh"
+
+using namespace sc_core;
+
+void
+reportHandler(const sc_report &report, const sc_actions &actions)
+{
+    uint64_t systemc_time = report.get_time().value();
+    uint64_t gem5_time = curTick();
+
+    if (actions & SC_DO_NOTHING)
+        return;
+
+    if (actions & SC_DISPLAY || actions & SC_LOG)
+    {
+        std::ostream& stream = actions & SC_DISPLAY ? std::cout : std::cerr;
+
+        stream << report.get_time();
+
+        if (gem5_time < systemc_time) {
+            stream << " (<) ";
+        } else if (gem5_time > systemc_time) {
+            stream << " (!) ";
+        } else {
+            stream << " (=) ";
+        }
+
+        stream << ": " << report.get_msg_type()
+               << ' ' << report.get_msg() << '\n';
+    }
+
+    if (actions & SC_THROW) {
+        std::cerr << "warning: the report handler ignored a SC_THROW action\n";
+    } else if (actions & SC_INTERRUPT) {
+        std::cerr << "warning: the report handler ignored a SC_INTERRUPT"
+                  << "action\n";
+    } else if (actions & SC_CACHE_REPORT) {
+        std::cerr << "warning: the report handler ignored a SC_CACHE_REPORT"
+                  << "action\n";
+    }
+
+    if (actions & SC_STOP)
+        sc_stop();
+
+    if (actions & SC_ABORT)
+        abort();
+}
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/master_port/SConstruct
--- a/util/tlm/examples/master_port/SConstruct	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/master_port/SConstruct	Thu Nov 10 18:06:10 2016 +0100
@@ -32,6 +32,8 @@
 #
 # Authors: Christian Menard
 
+import os
+
 gem5_arch = 'ARM'
 gem5_variant = 'opt'
 #gem5_variant = 'debug'
@@ -41,6 +43,9 @@
 target = 'gem5.' + gem5_variant + '.sc'
 
 env = Environment()
+# Import PKG_CONFIG_PATH from the external environment
+if os.environ.has_key('PKG_CONFIG_PATH'):
+    env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
 
 # search for SystemC
 env.ParseConfig('pkg-config --cflags --libs systemc')
@@ -48,7 +53,8 @@
 # add include dirs
 env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
                     gem5_root + '/util/systemc',
-                    gem5_root + '/util/tlm'])
+                    gem5_root + '/util/tlm',
+                    '../common'])
 
 env.Append(LIBS=['gem5_' + gem5_variant])
 env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
@@ -66,6 +72,6 @@
                gem5_root + '/util/systemc/stats.cc']
 
 src_tlm     = Glob(gem5_root + '/util/tlm/*.cc')
-src_main    = Glob('*.cc')
+src_main    = Glob('*.cc') + Glob('../common/*.cc')
 
 main = env.Program(target, src_systemc + src_tlm + src_main)
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/master_port/main.cc
--- a/util/tlm/examples/master_port/main.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/master_port/main.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -35,56 +35,31 @@
 #include <systemc>
 #include <tlm>
 
-#include "sc_master_port.hh"
+#include "cli_parser.hh"
+#include "gem5_master_transactor.hh"
+#include "report_handler.hh"
 #include "sim_control.hh"
 #include "stats.hh"
 #include "traffic_generator.hh"
 
-// Defining global string variable decalred in stats.hh
-std::string filename;
-
-void
-reportHandler(const sc_core::sc_report& report,
-              const sc_core::sc_actions& actions)
-{
-    uint64_t systemc_time = report.get_time().value();
-    uint64_t gem5_time = curTick();
-
-    std::cerr << report.get_time();
-
-    if (gem5_time < systemc_time) {
-        std::cerr << " (<) ";
-    } else if (gem5_time > systemc_time) {
-        std::cerr << " (!) ";
-    } else {
-        std::cerr << " (=) ";
-    }
-
-    std::cerr << ": " << report.get_msg_type() << ' ' << report.get_msg()
-              << '\n';
-}
-
 int
 sc_main(int argc, char** argv)
 {
+    CliParser parser;
+    parser.parse(argc, argv);
+
     sc_core::sc_report_handler::set_handler(reportHandler);
 
-    SimControl simControl("gem5", argc, argv);
+    // We need one instance of the Gem5SimControl.
+    Gem5SystemC::Gem5SimControl simControl("gem5",
+                                           parser.getConfigFile(),
+                                           parser.getSimulationEnd(),
+                                           parser.getDebugFlags());
+
     TrafficGenerator trafficGenerator("traffic_generator");
+    Gem5SystemC::Gem5MasterTransactor transactor("transactor", "transactor");
 
-    filename = "m5out/stats-systemc.txt";
-
-    tlm::tlm_target_socket<>* mem_port =
-      dynamic_cast<tlm::tlm_target_socket<>*>(
-        sc_core::sc_find_object("gem5.memory"));
-
-    if (mem_port) {
-        SC_REPORT_INFO("sc_main", "Port Found");
-        trafficGenerator.socket.bind(*mem_port);
-    } else {
-        SC_REPORT_FATAL("sc_main", "Port Not Found");
-        std::exit(EXIT_FAILURE);
-    }
+    trafficGenerator.socket.bind(transactor.socket);
 
     std::cout << "Starting sc_main" << std::endl;
 
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/master_port/tlm.py
--- a/util/tlm/examples/master_port/tlm.py	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/master_port/tlm.py	Thu Nov 10 18:06:10 2016 +0100
@@ -61,7 +61,7 @@
 # Create a external TLM port:
 system.tlm = ExternalMaster()
 system.tlm.port_type = "tlm_master"
-system.tlm.port_data = "memory"
+system.tlm.port_data = "transactor"
 
 # Route the connections:
 system.system_port = system.membus.slave
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/master_port/traffic_generator.cc
--- a/util/tlm/examples/master_port/traffic_generator.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/master_port/traffic_generator.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -53,7 +53,7 @@
 
     while (true) {
 
-        wait(sc_core::sc_time(rnd.random(1,100), sc_core::SC_NS));
+        wait(sc_core::sc_time((double) rnd.random(1,100), sc_core::SC_NS));
 
         auto trans = mm.allocate();
         trans->acquire();
@@ -126,7 +126,7 @@
         tlm::tlm_phase fw_phase = tlm::END_RESP;
 
         // stress the retry mechanism by deferring the response
-        auto delay = sc_core::sc_time(rand() % 50, sc_core::SC_NS);
+        auto delay = sc_core::sc_time((double) (rand() % 50), sc_core::SC_NS);
         socket->nb_transport_fw(trans, fw_phase, delay);
         trans.release();
     }
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/slave_port/SConstruct
--- a/util/tlm/examples/slave_port/SConstruct	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/slave_port/SConstruct	Thu Nov 10 18:06:10 2016 +0100
@@ -32,6 +32,8 @@
 #
 # Authors: Christian Menard
 
+import os
+
 gem5_arch = 'ARM'
 gem5_variant = 'opt'
 #gem5_variant = 'debug'
@@ -41,6 +43,9 @@
 target = 'gem5.' + gem5_variant + '.sc'
 
 env = Environment()
+# Import PKG_CONFIG_PATH from the external environment
+if os.environ.has_key('PKG_CONFIG_PATH'):
+    env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
 
 # search for SystemC
 env.ParseConfig('pkg-config --cflags --libs systemc')
@@ -48,7 +53,8 @@
 # add include dirs
 env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
                     gem5_root + '/util/systemc',
-                    gem5_root + '/util/tlm'])
+                    gem5_root + '/util/tlm',
+                    '../common'])
 
 env.Append(LIBS=['gem5_' + gem5_variant])
 env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
@@ -66,6 +72,6 @@
                gem5_root + '/util/systemc/stats.cc']
 
 src_tlm     = Glob(gem5_root + '/util/tlm/*.cc')
-src_main    = Glob('*.cc')
+src_main    = Glob('*.cc') + Glob('../common/*.cc')
 
 main = env.Program(target, src_systemc + src_tlm + src_main)
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/slave_port/main.cc
--- a/util/tlm/examples/slave_port/main.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/slave_port/main.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -43,67 +43,39 @@
  *
  */
 
-#include <tlm_utils/simple_target_socket.h>
-
 #include <systemc>
 #include <tlm>
 
+#include "cli_parser.hh"
+#include "gem5_slave_transactor.hh"
+#include "report_handler.hh"
 #include "sc_target.hh"
 #include "sim_control.hh"
 #include "stats.hh"
 
-// Defining global string variable decalred in stats.hh
-std::string filename;
-
-void
-reportHandler(const sc_core::sc_report &report,
-              const sc_core::sc_actions &actions)
-{
-    uint64_t systemc_time = report.get_time().value();
-    uint64_t gem5_time = curTick();
-
-    std::cerr << report.get_time();
-
-    if (gem5_time < systemc_time) {
-        std::cerr << " (<) ";
-    } else if (gem5_time > systemc_time) {
-        std::cerr << " (!) ";
-    } else {
-        std::cerr << " (=) ";
-    }
-
-    std::cerr << ": " << report.get_msg_type()
-              << ' ' << report.get_msg() << '\n';
-}
-
 int
 sc_main(int argc, char **argv)
 {
+    CliParser parser;
+    parser.parse(argc, argv);
+
     sc_core::sc_report_handler::set_handler(reportHandler);
 
-    SimControl sim_control("gem5", argc, argv);
-    Target *memory;
+    // We need one instance of the Gem5SimControl.
+    Gem5SystemC::Gem5SimControl simControl("gem5",
+                                           parser.getConfigFile(),
+                                           parser.getSimulationEnd(),
+                                           parser.getDebugFlags());
 
-    filename = "m5out/stats-systemc.txt";
+    unsigned long long int memorySize = 512*1024*1024ULL;
 
-    tlm::tlm_initiator_socket <> *mem_port =
-        dynamic_cast<tlm::tlm_initiator_socket<> *>(
-                    sc_core::sc_find_object("gem5.memory")
-                );
+    Gem5SystemC::Gem5SlaveTransactor transactor("transactor", "transactor");
+    Target memory("memory",
+                  parser.getVerboseFlag(),
+                  memorySize,
+                  parser.getMemoryOffset());
 
-    if (mem_port) {
-        SC_REPORT_INFO("sc_main", "Port Found");
-        unsigned long long int size = 512*1024*1024ULL;
-        memory = new Target("memory",
-                            sim_control.getDebugFlag(),
-                            size,
-                            sim_control.getOffset());
-
-        memory->socket.bind(*mem_port);
-    } else {
-        SC_REPORT_FATAL("sc_main", "Port Not Found");
-        std::exit(EXIT_FAILURE);
-    }
+    memory.socket.bind(transactor.socket);
 
     sc_core::sc_start();
 
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/slave_port/sc_target.cc
--- a/util/tlm/examples/slave_port/sc_target.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/slave_port/sc_target.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -165,7 +165,7 @@
 
     /* Queue the acceptance and the response with the appropriate latency */
     bw_phase = tlm::END_REQ;
-    delay = sc_time(10, SC_NS); // Accept delay
+    delay = sc_time(10.0, SC_NS); // Accept delay
 
     tlm::tlm_sync_enum status;
     status = socket->nb_transport_bw(trans, bw_phase, delay);
@@ -173,7 +173,7 @@
     /* Ignore return value;
      * initiator cannot terminate transaction at this point
      * Queue internal event to mark beginning of response: */
-    delay = delay + sc_time(40, SC_NS); // Latency
+    delay = delay + sc_time(40.0, SC_NS); // Latency
     target_done_event.notify(delay);
 
     assert(transaction_in_progress == 0);
@@ -249,7 +249,7 @@
 
     response_in_progress = true;
     bw_phase = tlm::BEGIN_RESP;
-    delay = sc_time(10, SC_NS);
+    delay = sc_time(10.0, SC_NS);
     status = socket->nb_transport_bw( trans, bw_phase, delay );
 
     if (status == tlm::TLM_UPDATED) {
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/examples/slave_port/tlm.py
--- a/util/tlm/examples/slave_port/tlm.py	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/examples/slave_port/tlm.py	Thu Nov 10 18:06:10 2016 +0100
@@ -64,7 +64,7 @@
 system.tlm = ExternalSlave()
 system.tlm.addr_ranges = [AddrRange('512MB')]
 system.tlm.port_type = "tlm_slave"
-system.tlm.port_data = "memory"
+system.tlm.port_data = "transactor"
 
 # Route the connections:
 system.cpu.port = system.membus.slave
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/gem5_master_transactor.hh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/gem5_master_transactor.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#ifndef __GEM5_MASTER_TRANSACTOR_HH__
+#define __GEM5_MASTER_TRANSACTOR_HH__
+
+#include <tlm_utils/simple_target_socket.h>
+
+#include <systemc>
+#include <tlm>
+
+#include "sc_master_port.hh"
+
+namespace Gem5SystemC
+{
+
+class Gem5MasterTransactor : public sc_core::sc_module
+{
+  public:
+    // module interface
+    tlm_utils::simple_target_socket<SCMasterPort> socket;
+
+  private:
+    std::string portName;
+
+  public:
+    SC_HAS_PROCESS(Gem5MasterTransactor);
+
+    Gem5MasterTransactor(sc_core::sc_module_name name,
+                         const std::string& portName);
+
+    void before_end_of_elaboration();
+};
+
+}
+
+#endif
+
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/gem5_master_transactor.cc
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/gem5_master_transactor.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#include "gem5_master_transactor.hh"
+#include "sc_master_port.hh"
+#include "sim_control.hh"
+
+namespace Gem5SystemC
+{
+
+Gem5MasterTransactor::Gem5MasterTransactor(sc_core::sc_module_name name,
+                                           const std::string& portName)
+    : sc_core::sc_module(name),
+      socket(portName.c_str()),
+      portName(portName)
+{
+    if (portName.empty()) {
+        SC_REPORT_ERROR(name, "No port name specified!\n");
+    }
+}
+
+void
+Gem5MasterTransactor::before_end_of_elaboration()
+{
+    auto* simControl = Gem5SimControl::getInstance();
+    assert(simControl != nullptr);
+    auto* port = simControl->getMasterPort(portName);
+    assert(port != nullptr);
+    port->bindToTransactor(this);
+}
+
+}
+
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/gem5_slave_transactor.hh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/gem5_slave_transactor.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#ifndef __GEM5_SLAVE_TRANSACTOR_HH__
+#define __GEM5_SLAVE_TRANSACTOR_HH__
+
+#include <tlm_utils/simple_initiator_socket.h>
+
+#include <systemc>
+#include <tlm>
+
+#include "sc_slave_port.hh"
+
+namespace Gem5SystemC
+{
+
+class Gem5SlaveTransactor : public sc_core::sc_module
+{
+  public:
+    // module interface
+    tlm_utils::simple_initiator_socket<SCSlavePort> socket;
+
+  private:
+    std::string portName;
+
+  public:
+    SC_HAS_PROCESS(Gem5SlaveTransactor);
+
+    Gem5SlaveTransactor(sc_core::sc_module_name name,
+                        const std::string& portName);
+
+    void end_of_elaboration();
+};
+
+}
+
+#endif
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/gem5_slave_transactor.cc
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/gem5_slave_transactor.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#include "gem5_slave_transactor.hh"
+#include "sc_slave_port.hh"
+#include "sim_control.hh"
+
+namespace Gem5SystemC
+{
+
+Gem5SlaveTransactor::Gem5SlaveTransactor(sc_core::sc_module_name name,
+                                         const std::string& portName)
+    : sc_core::sc_module(name),
+      socket(portName.c_str()),
+      portName(portName)
+{
+    if (portName.empty()) {
+        SC_REPORT_ERROR(name, "No port name specified!\n");
+    }
+}
+
+void
+Gem5SlaveTransactor::end_of_elaboration()
+{
+    auto* simControl = Gem5SimControl::getInstance();
+    assert(simControl != nullptr);
+    auto* port = simControl->getSlavePort(portName);
+    assert(port != nullptr);
+    port->bindToTransactor(this);
+}
+
+}
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sc_master_port.hh
--- a/util/tlm/sc_master_port.hh	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sc_master_port.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -35,18 +35,20 @@
 #ifndef __SC_MASTER_PORT_HH__
 #define __SC_MASTER_PORT_HH__
 
+#include <systemc>
+#include <tlm>
 #include <tlm_utils/peq_with_cb_and_phase.h>
-#include <tlm_utils/simple_target_socket.h>
-
-#include <tlm>
 
 #include <mem/external_master.hh>
-#include <sc_module.hh>
 #include <sc_peq.hh>
+#include <sim_control.hh>
 
 namespace Gem5SystemC
 {
 
+// forward declaration
+class Gem5MasterTransactor;
+
 /**
  * This is a transactor that translates TLM transactiosn to gem5 packets.
  *
@@ -84,11 +86,9 @@
 
     bool responseInProgress;
 
-    // Keep a reference to the gem5 SystemC module
-    Module& module;
+    Gem5MasterTransactor* transactor;
 
-  public:
-    tlm_utils::simple_target_socket<SCMasterPort> tSocket;
+    System* system;
 
   protected:
     // payload event call back
@@ -111,10 +111,9 @@
   public:
     SCMasterPort(const std::string& name_,
                  const std::string& systemc_name,
-                 ExternalMaster& owner_,
-                 Module& module);
+                 ExternalMaster& owner_);
 
-    static void registerPortHandler(Module& module);
+    void bindToTransactor(Gem5MasterTransactor* transactor);
 
     friend PayloadEvent<SCMasterPort>;
 
@@ -132,6 +131,19 @@
     void checkTransaction(tlm::tlm_generic_payload& trans);
 };
 
+class SCMasterPortHandler : public ExternalMaster::Handler
+{
+  private:
+    Gem5SimControl& control;
+
+  public:
+    SCMasterPortHandler(Gem5SimControl& control) : control(control) {}
+
+    ExternalMaster::Port *getExternalPort(const std::string &name,
+                                          ExternalMaster &owner,
+                                          const std::string &port_data);
+};
+
 }
 
 #endif
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sc_master_port.cc
--- a/util/tlm/sc_master_port.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sc_master_port.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -34,6 +34,7 @@
 
 #include <sstream>
 
+#include "gem5_master_transactor.hh"
 #include "params/ExternalMaster.hh"
 #include "sc_master_port.hh"
 #include "sim/system.hh"
@@ -76,19 +77,25 @@
 
 SCMasterPort::SCMasterPort(const std::string& name_,
                            const std::string& systemc_name,
-                           ExternalMaster& owner_,
-                           Module& module)
+                           ExternalMaster& owner_)
   : ExternalMaster::Port(name_, owner_),
-    tSocket(systemc_name.c_str()),
     peq(this, &SCMasterPort::peq_cb),
     waitForRetry(false),
     pendingRequest(nullptr),
     needToSendRetry(false),
     responseInProgress(false),
-    module(module)
+    transactor(nullptr)
 {
-    auto system =
+    system =
         dynamic_cast<const ExternalMasterParams*>(owner_.params())->system;
+}
+
+void
+SCMasterPort::bindToTransactor(Gem5MasterTransactor* transactor)
+{
+    sc_assert(this->transactor == nullptr);
+
+    this->transactor = transactor;
 
     /*
      * Register the TLM non-blocking interface when using gem5 Timing mode and
@@ -100,16 +107,18 @@
      */
     if (system->isTimingMode()) {
         SC_REPORT_INFO("SCMasterPort", "register non-blocking interface");
-        tSocket.register_nb_transport_fw(this,
-                                         &SCMasterPort::nb_transport_fw);
+        transactor->socket.register_nb_transport_fw(this,
+                                &SCMasterPort::nb_transport_fw);
     } else if (system->isAtomicMode()) {
         SC_REPORT_INFO("SCMasterPort", "register blocking interface");
-        tSocket.register_b_transport(this, &SCMasterPort::b_transport);
+        transactor->socket.register_b_transport(this,
+                                &SCMasterPort::b_transport);
     } else {
         panic("gem5 operates neither in Timing nor in Atomic mode");
     }
 
-    tSocket.register_transport_dbg(this, &SCMasterPort::transport_dbg);
+    transactor->socket.register_transport_dbg(this,
+                                              &SCMasterPort::transport_dbg);
 }
 
 void
@@ -151,8 +160,11 @@
 SCMasterPort::peq_cb(tlm::tlm_generic_payload& trans,
                        const tlm::tlm_phase& phase)
 {
+    auto* simControl = Gem5SimControl::getInstance();
+    assert(simControl != nullptr);
+
     // catch up with SystemC time
-    module.catchup();
+    simControl->catchup();
     assert(curTick() == sc_core::sc_time_stamp().value());
 
     switch (phase) {
@@ -168,7 +180,7 @@
 
     // the functions called above may have scheduled gem5 events
     // -> notify the event loop handler
-    module.notify();
+    simControl->notify();
 }
 
 void
@@ -214,7 +226,7 @@
     tlm::tlm_phase phase = tlm::END_REQ;
     auto delay = sc_core::SC_ZERO_TIME;
 
-    auto status = tSocket->nb_transport_bw(trans, phase, delay);
+    auto status = transactor->socket->nb_transport_bw(trans, phase, delay);
     panic_if(status != tlm::TLM_ACCEPTED,
              "Unexpected status after sending END_REQ");
 }
@@ -302,7 +314,7 @@
 
     trans.set_response_status(tlm::TLM_OK_RESPONSE);
 
-    auto status = tSocket->nb_transport_bw(trans, phase, delay);
+    auto status = transactor->socket->nb_transport_bw(trans, phase, delay);
     panic_if(status != tlm::TLM_ACCEPTED && status != tlm::TLM_COMPLETED,
              "Unexpected status after sending BEGIN_RESP");
 
@@ -331,27 +343,17 @@
                       "received address range change but ignored it");
 }
 
-class SCMasterPortHandler : public ExternalMaster::Handler
+ExternalMaster::Port*
+SCMasterPortHandler::getExternalPort(const std::string &name,
+                                     ExternalMaster &owner,
+                                     const std::string &port_data)
 {
-    Module& module;
+    // Create and register a new SystemC slave port
+    auto* port = new SCMasterPort(name, port_data, owner);
 
-  public:
-    SCMasterPortHandler(Module& module) : module(module) {}
+    control.registerMasterPort(port_data, port);
 
-    ExternalMaster::Port* getExternalPort(const std::string& name,
-                                          ExternalMaster& owner,
-                                          const std::string& port_data)
-    {
-        // This will make a new initiatiator port
-        return new SCMasterPort(name, port_data, owner, module);
-    }
-};
-
-void
-SCMasterPort::registerPortHandler(Module& module)
-{
-    ExternalMaster::registerHandler("tlm_master",
-                                    new SCMasterPortHandler(module));
+    return port;
 }
 
 } // namespace Gem5SystemC
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sc_slave_port.hh
--- a/util/tlm/sc_slave_port.hh	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sc_slave_port.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -37,19 +37,20 @@
 #ifndef __SC_SLAVE_PORT_HH__
 #define __SC_SLAVE_PORT_HH__
 
-#include <tlm_utils/simple_initiator_socket.h>
-
-#include <map>
 #include <systemc>
 #include <tlm>
 
 #include "mem/external_slave.hh"
 #include "sc_mm.hh"
-#include "sc_module.hh"
 #include "sc_peq.hh"
+#include "sim_control.hh"
 
 namespace Gem5SystemC
 {
+
+// forward declaration
+class Gem5SlaveTransactor;
+
 /**
  * Test that gem5 is at the same time as SystemC
  */
@@ -61,8 +62,6 @@
 class SCSlavePort : public ExternalSlave::Port
 {
   public:
-    tlm_utils::simple_initiator_socket<SCSlavePort> iSocket;
-
     /** One instance of pe and the related callback needed */
     //payloadEvent<SCSlavePort> pe;
     void pec(PayloadEvent<SCSlavePort> * pe,
@@ -95,21 +94,36 @@
     void recvRespRetry();
     void recvFunctionalSnoop(PacketPtr packet);
 
+    Gem5SlaveTransactor* transactor;
+
+  public:
     /** The TLM initiator interface */
     tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload& trans,
                                        tlm::tlm_phase& phase,
                                        sc_core::sc_time& t);
 
-  public:
     SCSlavePort(const std::string &name_,
                 const std::string &systemc_name,
                 ExternalSlave &owner_);
 
-    static void registerPortHandler();
+    void bindToTransactor(Gem5SlaveTransactor* transactor);
 
     friend PayloadEvent<SCSlavePort>;
 };
 
+class SCSlavePortHandler : public ExternalSlave::Handler
+{
+  private:
+    Gem5SimControl& control;
+
+  public:
+    SCSlavePortHandler(Gem5SimControl& control) : control(control) {}
+
+    ExternalSlave::Port *getExternalPort(const std::string &name,
+                                         ExternalSlave &owner,
+                                         const std::string &port_data);
+};
+
 }
 
 #endif // __SC_SLAVE_PORT_H__
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sc_slave_port.cc
--- a/util/tlm/sc_slave_port.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sc_slave_port.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -35,11 +35,7 @@
  *          Christian Menard
  */
 
-#include <cctype>
-#include <iomanip>
-#include <sstream>
-
-#include "debug/ExternalPort.hh"
+#include "gem5_slave_transactor.hh"
 #include "sc_ext.hh"
 #include "sc_mm.hh"
 #include "sc_slave_port.hh"
@@ -80,7 +76,7 @@
     } else if (packet->isWrite()) {
         trans.set_command(tlm::TLM_WRITE_COMMAND);
     } else {
-        SC_REPORT_FATAL("transactor", "No R/W packet");
+        SC_REPORT_FATAL("SCSlavePort", "No R/W packet");
     }
 }
 
@@ -91,7 +87,7 @@
 SCSlavePort::recvAtomic(PacketPtr packet)
 {
     CAUGHT_UP;
-    SC_REPORT_INFO("transactor", "recvAtomic hasn't been tested much");
+    SC_REPORT_INFO("SCSlavePort", "recvAtomic hasn't been tested much");
 
     panic_if(packet->cacheResponding(), "Should not see packets where cache "
              "is responding");
@@ -114,15 +110,15 @@
 
     /* Execute b_transport: */
     if (packet->cmd == MemCmd::SwapReq) {
-        SC_REPORT_FATAL("transactor", "SwapReq not supported");
+        SC_REPORT_FATAL("SCSlavePort", "SwapReq not supported");
     } else if (packet->isRead()) {
-        iSocket->b_transport(*trans, delay);
+        transactor->socket->b_transport(*trans, delay);
     } else if (packet->isInvalidate()) {
         // do nothing
     } else if (packet->isWrite()) {
-        iSocket->b_transport(*trans, delay);
+        transactor->socket->b_transport(*trans, delay);
     } else {
-        SC_REPORT_FATAL("transactor", "Typo of request not supported");
+        SC_REPORT_FATAL("SCSlavePort", "Typo of request not supported");
     }
 
     if (packet->needsResponse()) {
@@ -150,9 +146,9 @@
     trans->set_auto_extension(extension);
 
     /* Execute Debug Transport: */
-    unsigned int bytes = iSocket->transport_dbg(*trans);
+    unsigned int bytes = transactor->socket->transport_dbg(*trans);
     if (bytes != trans->get_data_length()) {
-        SC_REPORT_FATAL("transactor","debug transport was not completed");
+        SC_REPORT_FATAL("SCSlavePort","debug transport was not completed");
     }
 
     trans->release();
@@ -162,7 +158,7 @@
 SCSlavePort::recvTimingSnoopResp(PacketPtr packet)
 {
     /* Snooping should be implemented with tlm_dbg_transport */
-    SC_REPORT_FATAL("transactor","unimplemented func.: recvTimingSnoopResp");
+    SC_REPORT_FATAL("SCSlavePort","unimplemented func.: recvTimingSnoopResp");
     return false;
 }
 
@@ -170,7 +166,7 @@
 SCSlavePort::recvFunctionalSnoop(PacketPtr packet)
 {
     /* Snooping should be implemented with tlm_dbg_transport */
-    SC_REPORT_FATAL("transactor","unimplemented func.: recvFunctionalSnoop");
+    SC_REPORT_FATAL("SCSlavePort","unimplemented func.: recvFunctionalSnoop");
 }
 
 /**
@@ -223,7 +219,7 @@
     sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
     tlm::tlm_phase phase = tlm::BEGIN_REQ;
     tlm::tlm_sync_enum status;
-    status = iSocket->nb_transport_fw(*trans, phase, delay);
+    status = transactor->socket->nb_transport_fw(*trans, phase, delay);
     /* Check returned value: */
     if (status == tlm::TLM_ACCEPTED) {
         sc_assert(phase == tlm::BEGIN_REQ);
@@ -288,13 +284,13 @@
                 /* Send END_RESP and we're finished: */
                 tlm::tlm_phase fw_phase = tlm::END_RESP;
                 sc_time delay = SC_ZERO_TIME;
-                iSocket->nb_transport_fw(trans, fw_phase, delay);
+                transactor->socket->nb_transport_fw(trans, fw_phase, delay);
                 /* Release the transaction with all the extensions */
                 trans.release();
             }
         }
     } else {
-        SC_REPORT_FATAL("transactor", "Invalid protocol phase in pec");
+        SC_REPORT_FATAL("SCSlavePort", "Invalid protocol phase in pec");
     }
     delete pe;
 }
@@ -317,7 +313,7 @@
 
     sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
     tlm::tlm_phase phase = tlm::END_RESP;
-    iSocket->nb_transport_fw(*trans, phase, delay);
+    transactor->socket->nb_transport_fw(*trans, phase, delay);
     // Release transaction with all the extensions
     trans->release();
 }
@@ -337,30 +333,35 @@
     const std::string &systemc_name,
     ExternalSlave &owner_) :
     ExternalSlave::Port(name_, owner_),
-    iSocket(systemc_name.c_str()),
     blockingRequest(NULL),
     needToSendRequestRetry(false),
-    blockingResponse(NULL)
+    blockingResponse(NULL),
+    transactor(nullptr)
 {
-    iSocket.register_nb_transport_bw(this, &SCSlavePort::nb_transport_bw);
 }
 
-class SlavePortHandler : public ExternalSlave::Handler
+void
+SCSlavePort::bindToTransactor(Gem5SlaveTransactor* transactor)
 {
-  public:
-    ExternalSlave::Port *getExternalPort(const std::string &name,
-        ExternalSlave &owner,
-        const std::string &port_data)
-    {
-        // This will make a new initiatiator port
-        return new SCSlavePort(name, port_data, owner);
-    }
-};
+    sc_assert(this->transactor == nullptr);
 
-void
-SCSlavePort::registerPortHandler()
+    this->transactor = transactor;
+
+    transactor->socket.register_nb_transport_bw(this,
+                                                &SCSlavePort::nb_transport_bw);
+}
+
+ExternalSlave::Port*
+SCSlavePortHandler::getExternalPort(const std::string &name,
+                                    ExternalSlave &owner,
+                                    const std::string &port_data)
 {
-    ExternalSlave::registerHandler("tlm_slave", new SlavePortHandler);
+    // Create and register a new SystemC slave port
+    auto* port = new SCSlavePort(name, port_data, owner);
+
+    control.registerSlavePort(port_data, port);
+
+    return port;
 }
 
 }
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sim_control.hh
--- a/util/tlm/sim_control.hh	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sim_control.hh	Thu Nov 10 18:06:10 2016 +0100
@@ -47,30 +47,74 @@
 #include "sim/cxx_manager.hh"
 #include "sim/system.hh"
 
-class SimControl : public Gem5SystemC::Module
+namespace Gem5SystemC
+{
+
+// forward declerations
+class SCSlavePort;
+class SCMasterPort;
+
+/**
+ * This is the central SystemC module that orchestrates the gem5 simulation.
+ *
+ * The module is responsible for loading the configuration file, seting up and
+ * maintaining the event queues, as well as starting and ending the simulation.
+ * While it is mandatory to have one instance of this class for running a gem5
+ * simulation in SystemC, it is not allowed to have multiple instances!
+ */
+class Gem5SimControl : public Module
 {
   protected:
-    int argc;
-    char** argv;
     CxxConfigManager* config_manager;
     Gem5SystemC::Logger logger;
 
-    Tick sim_end;
-    bool debug;
-    unsigned int offset;
+    Tick simulationEnd;
+
+  private:
+    /*
+     * Keep track of the slave and master ports that are created by gem5
+     * according to the config file.
+     */
+    std::map<const std::string, SCSlavePort*> slavePorts;
+    std::map<const std::string, SCMasterPort*> masterPorts;
+
+    /// Pointer to a previously created instance.
+    static Gem5SimControl* instance;
 
   public:
-    SC_HAS_PROCESS(SimControl);
+    SC_HAS_PROCESS(Gem5SimControl);
 
-    SimControl(sc_core::sc_module_name name, int argc_, char** argv_);
+    /**
+     * Constructor.
+     *
+     * This class has a public contructor altough the class is actually a
+     * singleton. The public constructor is required to ensure compatibility
+     * to external SystemC based tools. For the same reason, the constructor
+     * parameters are basic types (int, string).
+     *
+     * @param configFile     location of the gem5 configuration file
+     * @param simulationEnd  number ot ticks to simulate
+     * @param gem5DebugFlags a space separated list of gem5 debug flags to be
+     *                       set, a prepended '-' clears the flag
+     */
+    Gem5SimControl(sc_core::sc_module_name name,
+                   const std::string& configFile,
+                   uint64_t simulationEnd,
+                   const std::string& gem5DebugFlags);
+
+    void registerSlavePort(const std::string& name, SCSlavePort* port);
+    void registerMasterPort(const std::string& name, SCMasterPort* port);
+    SCSlavePort* getSlavePort(const std::string& name);
+    SCMasterPort* getMasterPort(const std::string& name);
 
     void before_end_of_elaboration();
 
-    bool getDebugFlag() { return debug; }
+    void run();
 
-    unsigned int getOffset() { return offset; }
-
-    void run();
+    /// Access a previously generated instance.
+    static Gem5SimControl* getInstance() { return instance; }
 };
 
+}
+
 #endif
diff -r 668120c36f3b -r a64e6cc90f4e util/tlm/sim_control.cc
--- a/util/tlm/sim_control.cc	Wed Nov 09 14:01:46 2016 +0100
+++ b/util/tlm/sim_control.cc	Thu Nov 10 18:06:10 2016 +0100
@@ -54,44 +54,34 @@
 #include "sim_control.hh"
 #include "stats.hh"
 
-void
-usage(const std::string& prog_name)
-{
-    std::cerr
-      << "Usage: " << prog_name
-      << (" <config_file.ini> [ <option> ]\n\n"
-          "OPTIONS:\n"
+// Define global string variable decalred in stats.hh
+std::string filename = "m5out/stats-systemc.txt";
 
-          "    -o <offset>                  -- set memory offset\n"
-          "    -p <object> <param> <value>  -- set a parameter\n"
-          "    -v <object> <param> <values> -- set a vector parameter from a\n"
-          "                                    comma separated values string\n"
-          "    -d <flag>                    -- set a debug flag\n"
-          "                                    (-<flag> clear a flag)\n"
-          "    -D                           -- debug on\n"
-          "    -e <ticks>                   -- end of simulation after a \n"
-          "                                    given number of ticks\n"
-          "\n");
-    std::exit(EXIT_FAILURE);
-}
+namespace Gem5SystemC {
 
-SimControl::SimControl(sc_core::sc_module_name name, int argc_, char** argv_)
-  : Gem5SystemC::Module(name),
-    argc(argc_),
-    argv(argv_)
+Gem5SimControl* Gem5SimControl::instance = nullptr;
+
+Gem5SimControl::Gem5SimControl(sc_core::sc_module_name name,
+                               const std::string& configFile,
+                               uint64_t simulationEnd,
+                               const std::string& gem5DebugFlags)
+  : Gem5SystemC::Module(name)
+  , simulationEnd(simulationEnd)
 {
     SC_THREAD(run);
 
-    std::string prog_name(argv[0]);
-    unsigned int arg_ptr = 1;
-
-    if (argc == 1) {
-        usage(prog_name);
+    if (instance != nullptr) {
+        std::cerr << "Tried to instantiate Gem5SimControl more than once!\n";
+        std::exit(EXIT_FAILURE);
     }
+    instance = this;
 
     cxxConfigInit();
-    Gem5SystemC::SCSlavePort::registerPortHandler();
-    Gem5SystemC::SCMasterPort::registerPortHandler(*this);
+
+    // register the systemc slave and master port handler
+    ExternalSlave::registerHandler("tlm_slave", new SCSlavePortHandler(*this));
+    ExternalMaster::registerHandler("tlm_master",
+                                    new SCMasterPortHandler(*this));
 
     Trace::setDebugLogger(&logger);
 
@@ -106,79 +96,31 @@
 
     Trace::enable();
 
-    sim_end = 0;
-    debug = false;
-    offset = 0;
+    CxxConfigFileBase* conf = new CxxIniFile();
 
-    const std::string config_file(argv[arg_ptr]);
-
-    CxxConfigFileBase *conf = new CxxIniFile();
-
-    if (!conf->load(config_file.c_str())) {
-        std::cerr << "Can't open config file: " << config_file << '\n';
+    if (configFile.empty()) {
+        std::cerr << "No gem5 config file specified!\n";
         std::exit(EXIT_FAILURE);
     }
-    arg_ptr++;
+    if (!conf->load(configFile.c_str())) {
+        std::cerr << "Can't open gem5 config file: " << configFile << '\n';
+        std::exit(EXIT_FAILURE);
+    }
 
     config_manager = new CxxConfigManager(*conf);
 
-    try {
-        while (arg_ptr < argc) {
-            std::string option(argv[arg_ptr]);
-            arg_ptr++;
-            unsigned num_args = argc - arg_ptr;
-
-            if (option == "-p") {
-                if (num_args < 3) {
-                    usage(prog_name);
-                }
-
-                config_manager->setParam(argv[arg_ptr], argv[arg_ptr + 1],
-                argv[arg_ptr + 2]);
-                arg_ptr += 3;
-            } else if (option == "-v") {
-                std::vector<std::string> values;
-
-                if (num_args < 3) {
-                    usage(prog_name);
-                }
-                tokenize(values, argv[2], ',');
-                config_manager->setParamVector(argv[arg_ptr],
-                                               argv[arg_ptr],
-                                               values);
-                arg_ptr += 3;
-            } else if (option == "-d") {
-                if (num_args < 1) {
-                    usage(prog_name);
-                }
-                if (argv[arg_ptr][0] == '-') {
-                    clearDebugFlag(argv[arg_ptr] + 1);
-                } else {
-                    setDebugFlag(argv[arg_ptr]);
-                }
-                arg_ptr++;
-            } else if (option == "-e") {
-                if (num_args < 1) {
-                    usage(prog_name);
-                }
-                std::istringstream(argv[arg_ptr]) >> sim_end;
-                arg_ptr++;
-            } else if (option == "-D") {
-                debug = true;
-            } else if (option == "-o") {
-                if (num_args < 1) {
-                    usage(prog_name);
-                }
-                std::istringstream(argv[arg_ptr]) >> offset;
-                arg_ptr++;
-                /* code */
-            } else {
-                usage(prog_name);
-            }
+    // parse debug flags string and clear/set flags accordingly
+    std::stringstream ss;
+    ss.str(gem5DebugFlags);
+    std::string flag;
+    while (std::getline(ss, flag, ' ')) {
+        if (flag.at(0) == '-') {
+            flag.erase(0, 1); // remove the '-'
+            clearDebugFlag(flag.c_str());
         }
-    } catch (CxxConfigManager::Exception &e) {
-        std::cerr << e.name << ": " << e.message << "\n";
-        std::exit(EXIT_FAILURE);
+        else {
+            setDebugFlag(flag.c_str());
+        }
     }
 
     CxxConfig::statsEnable();
@@ -186,35 +128,35 @@
 
     try {
         config_manager->instantiate();
-    } catch (CxxConfigManager::Exception &e) {
-        std::cerr << "Config problem in sim object "
-                  << e.name << ": " << e.message << "\n";
+    } catch (CxxConfigManager::Exception& e) {
+        std::cerr << "Config problem in gem5 sim object " << e.name << ": "
+                  << e.message << "\n";
         std::exit(EXIT_FAILURE);
     }
 }
 
 void
-SimControl::before_end_of_elaboration()
+Gem5SimControl::before_end_of_elaboration()
 {
     try {
         config_manager->initState();
         config_manager->startup();
-    } catch (CxxConfigManager::Exception &e) {
-        std::cerr << "Config problem in sim object "
-            << e.name << ": " << e.message << "\n";
+    } catch (CxxConfigManager::Exception& e) {
+        std::cerr << "Config problem in sim object " << e.name << ": "
+                  << e.message << "\n";
         std::exit(EXIT_FAILURE);
     }
 }
 
 void
-SimControl::run()
+Gem5SimControl::run()
 {
-    GlobalSimLoopExitEvent *exit_event = NULL;
+    GlobalSimLoopExitEvent* exit_event = NULL;
 
-    if (sim_end == 0) {
+    if (simulationEnd == 0) {
         exit_event = simulate();
     } else {
-        exit_event = simulate(sim_end);
+        exit_event = simulate(simulationEnd);
     }
 
     std::cerr << "Exit at tick " << curTick()
@@ -226,3 +168,49 @@
     config_manager->deleteObjects();
 #endif
 }
+
+void
+Gem5SimControl::registerSlavePort(const std::string& name, SCSlavePort* port)
+{
+    if (slavePorts.find(name) == slavePorts.end()) {
+        slavePorts[name] = port;
+    } else {
+        std::cerr << "Slave Port " << name << " is already registered!\n";
+        std::exit(EXIT_FAILURE);
+    }
+}
+
+void
+Gem5SimControl::registerMasterPort(const std::string& name, SCMasterPort* port)
+{
+    if (masterPorts.find(name) == masterPorts.end()) {
+        masterPorts[name] = port;
+    } else {
+        std::cerr << "Master Port " << name << " is already registered!\n";
+        std::exit(EXIT_FAILURE);
+    }
+}
+
+SCSlavePort*
+Gem5SimControl::getSlavePort(const std::string& name)
+{
+    if (slavePorts.find(name) == slavePorts.end()) {
+        std::cerr << "Slave Port " << name << " was not found!\n";
+        std::exit(EXIT_FAILURE);
+    }
+
+    return slavePorts.at(name);
+}
+
+SCMasterPort*
+Gem5SimControl::getMasterPort(const std::string& name)
+{
+    if (masterPorts.find(name) == masterPorts.end()) {
+        std::cerr << "Master Port " << name << " was not found!\n";
+        std::exit(EXIT_FAILURE);
+    }
+
+    return masterPorts.at(name);
+}
+
+}