diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -211,9 +211,12 @@ } } for (auxv_t aux: auxv) { - initVirtMem.writeBlob(sp, (uint8_t *)&aux.a_type, sizeof(IntType)); - initVirtMem.writeBlob(sp + sizeof(IntType), (uint8_t *)&aux.a_val, - sizeof(IntType)); + initVirtMem.writeBlob(sp, + (uint8_t*)&aux.getAuxType(), + sizeof(IntType)); + initVirtMem.writeBlob(sp + sizeof(IntType), + (uint8_t*)&aux.getAuxVal(), + sizeof(IntType)); sp += 2 * sizeof(IntType); } for (int i = 0; i < 2; i++) { diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -370,9 +370,9 @@ // Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), intSize); } // Write out the terminating zeroed auxilliary vector diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -990,20 +990,22 @@ initVirtMem.writeString(file_name_base, filename.c_str()); // Fix up the aux vectors which point to data - assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM); - auxv[auxv.size() - 3].a_val = aux_data_base; - assert(auxv[auxv.size() - 2].a_type == M5_AT_EXECFN); - auxv[auxv.size() - 2].a_val = argv_array_base; - assert(auxv[auxv.size() - 1].a_type == M5_AT_PLATFORM); - auxv[auxv.size() - 1].a_val = aux_data_base + numRandomBytes; + assert(auxv[auxv.size() - 3].getHostAuxType() == M5_AT_RANDOM); + auxv[auxv.size() - 3].setAuxVal(aux_data_base); + assert(auxv[auxv.size() - 2].getHostAuxType() == M5_AT_EXECFN); + auxv[auxv.size() - 2].setAuxVal(argv_array_base); + assert(auxv[auxv.size() - 1].getHostAuxType() == M5_AT_PLATFORM); + auxv[auxv.size() - 1].setAuxVal(aux_data_base + numRandomBytes); // Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), + intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), + intSize); } // Write out the terminating zeroed auxiliary vector const uint64_t zero = 0; diff --git a/src/sim/aux_vector.hh b/src/sim/aux_vector.hh --- a/src/sim/aux_vector.hh +++ b/src/sim/aux_vector.hh @@ -37,40 +37,51 @@ #define __AUX_VECTOR_HH__ template -struct AuxVector +class AuxVector { - IntType a_type; - IntType a_val; + public: + AuxVector() = default; + AuxVector(IntType type, IntType val); - AuxVector() - {} + IntType const& getAuxType() const { return _auxType; } + IntType const& getAuxVal() const { return _auxVal; } + IntType const& getHostAuxType() const { return _auxHostType; } + IntType const& getHostAuxVal() const { return _auxHostVal; } - AuxVector(IntType type, IntType val); + void setAuxType(IntType type); + void setAuxVal(IntType val); + + private: + IntType _auxType = 0; + IntType _auxVal = 0; + IntType _auxHostType = 0; + IntType _auxHostVal = 0; }; enum AuxiliaryVectorType { - M5_AT_NULL = 0, - M5_AT_IGNORE = 1, - M5_AT_EXECFD = 2, - M5_AT_PHDR = 3, - M5_AT_PHENT = 4, - M5_AT_PHNUM = 5, - M5_AT_PAGESZ = 6, - M5_AT_BASE = 7, - M5_AT_FLAGS = 8, - M5_AT_ENTRY = 9, - M5_AT_NOTELF = 10, - M5_AT_UID = 11, - M5_AT_EUID = 12, - M5_AT_GID = 13, - M5_AT_EGID = 14, - M5_AT_PLATFORM = 15, - M5_AT_HWCAP = 16, - M5_AT_CLKTCK = 17, - M5_AT_SECURE = 23, - M5_BASE_PLATFORM = 24, - M5_AT_RANDOM = 25, - M5_AT_EXECFN = 31, + M5_AT_NULL = 0, // End of vector. + M5_AT_IGNORE = 1, // Ignored. + M5_AT_EXECFD = 2, // File descriptor of program if interpreter used. + M5_AT_PHDR = 3, // Address of program header tables in memory. + M5_AT_PHENT = 4, // Size in bytes of one program header entry. + M5_AT_PHNUM = 5, // Number of entries in program header table. + M5_AT_PAGESZ = 6, // System page size. + M5_AT_BASE = 7, // Base address of interpreter program in memory. + M5_AT_FLAGS = 8, // Unused. + M5_AT_ENTRY = 9, // Entry point of program after interpreter setup. + M5_AT_NOTELF = 10, // Non-zero if format is different than ELF. + M5_AT_UID = 11, // Address of real user ID of thread. + M5_AT_EUID = 12, // Address of effective user ID of thread. + M5_AT_GID = 13, // Address of real group ID of thread. + M5_AT_EGID = 14, // Address of effective group ID of thread. + M5_AT_PLATFORM = 15, // Platform string for the architecture. + M5_AT_HWCAP = 16, // Bits which describe the hardware capabilities. + M5_AT_CLKTCK = 17, // Frequency at which times() syscall increments. + M5_AT_SECURE = 23, // Whether to enable "secure mode" in executable. + M5_BASE_PLATFORM = 24, // Platform string (differs on PowerPC only). + M5_AT_RANDOM = 25, // Pointer to 16 bytes of random data. + M5_AT_HWCAP2 = 26, // Extension of AT_HWCAP. + M5_AT_EXECFN = 31, // Filename of the program. M5_AT_VECTOR_SIZE = 44 }; diff --git a/src/sim/aux_vector.cc b/src/sim/aux_vector.cc --- a/src/sim/aux_vector.cc +++ b/src/sim/aux_vector.cc @@ -68,10 +68,25 @@ template AuxVector::AuxVector(IntType type, IntType val) + : _auxType(TheISA::htog(type)), _auxVal(TheISA::htog(val)), + _auxHostType(type), _auxHostVal(val) +{ } + +template +inline void +AuxVector::setAuxType(IntType type) { - a_type = TheISA::htog(type); - a_val = TheISA::htog(val); + _auxType = TheISA::htog(type); + _auxHostType = type; } -template struct AuxVector; -template struct AuxVector; +template +inline void +AuxVector::setAuxVal(IntType val) +{ + _auxVal = TheISA::htog(val); + _auxHostVal = val; +} + +template class AuxVector; +template class AuxVector; # Node ID 11b2a627263e922c1317180695589752e9ab5d1d # Parent 74ef725af65802abab853930cc144f9740a314e8 diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -166,9 +166,9 @@ //Copy the aux stuff for (vector::size_type x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), intSize); } ThreadContext *tc = system->getThreadContext(contextIds[0]); diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -341,14 +341,14 @@ //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { - if (auxv[i].a_type == M5_AT_PLATFORM) { - auxv[i].a_val = platform_base; + if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) { + auxv[i].setAuxVal(platform_base); initVirtMem.writeString(platform_base, platform.c_str()); - } else if (auxv[i].a_type == M5_AT_EXECFN) { - auxv[i].a_val = aux_data_base; + } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) { + auxv[i].setAuxVal(aux_data_base); initVirtMem.writeString(aux_data_base, filename.c_str()); - } else if (auxv[i].a_type == M5_AT_RANDOM) { - auxv[i].a_val = aux_random_base; + } else if (auxv[i].getHostAuxType() == M5_AT_RANDOM) { + auxv[i].setAuxVal(aux_random_base); // Just leave the value 0, we don't want randomness } } @@ -356,9 +356,11 @@ //Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), + intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), + intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -175,9 +175,9 @@ // Copy the aux vector for (typename vector::size_type x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), intSize); } // Write out the terminating zeroed auxilliary vector diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -235,11 +235,11 @@ //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { - if (auxv[i].a_type == M5_AT_PLATFORM) { - auxv[i].a_val = platform_base; + if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) { + auxv[i].setAuxVal(platform_base); initVirtMem.writeString(platform_base, platform.c_str()); - } else if (auxv[i].a_type == M5_AT_EXECFN) { - auxv[i].a_val = aux_data_base; + } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) { + auxv[i].setAuxVal(aux_data_base); initVirtMem.writeString(aux_data_base, filename.c_str()); } } @@ -248,9 +248,9 @@ for (int x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0;