diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/O3CPU.py --- a/src/cpu/o3/O3CPU.py Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/O3CPU.py Fri Jul 16 20:48:56 2010 +0100 @@ -31,6 +31,7 @@ from m5.proxy import * from BaseCPU import BaseCPU from FUPool import * +from BPredUnit import BPredUnit if buildEnv['USE_CHECKER']: from O3Checker import O3Checker @@ -100,22 +101,6 @@ backComSize = Param.Unsigned(5, "Time buffer size for backwards communication") forwardComSize = Param.Unsigned(5, "Time buffer size for forward communication") - predType = Param.String("tournament", "Branch predictor type ('local', 'tournament')") - localPredictorSize = Param.Unsigned(2048, "Size of local predictor") - localCtrBits = Param.Unsigned(2, "Bits per counter") - localHistoryTableSize = Param.Unsigned(2048, "Size of local history table") - localHistoryBits = Param.Unsigned(11, "Bits for the local history") - globalPredictorSize = Param.Unsigned(8192, "Size of global predictor") - globalCtrBits = Param.Unsigned(2, "Bits per counter") - globalHistoryBits = Param.Unsigned(13, "Bits of history") - choicePredictorSize = Param.Unsigned(8192, "Size of choice predictor") - choiceCtrBits = Param.Unsigned(2, "Bits of choice counters") - - BTBEntries = Param.Unsigned(4096, "Number of BTB entries") - BTBTagSize = Param.Unsigned(16, "Size of the BTB tags, in bits") - - RASSize = Param.Unsigned(16, "RAS size") - LQEntries = Param.Unsigned(32, "Number of load queue entries") SQEntries = Param.Unsigned(32, "Number of store queue entries") LFSTSize = Param.Unsigned(1024, "Last fetched store table size") @@ -129,8 +114,6 @@ numIQEntries = Param.Unsigned(64, "Number of instruction queue entries") numROBEntries = Param.Unsigned(192, "Number of reorder buffer entries") - instShiftAmt = Param.Unsigned(2, "Number of bits to shift instructions by") - smtNumFetchingThreads = Param.Unsigned(1, "SMT Number of Fetching Threads") smtFetchPolicy = Param.String('SingleThread', "SMT Fetch policy") smtLSQPolicy = Param.String('Partitioned', "SMT LSQ Sharing Policy") @@ -141,6 +124,8 @@ smtROBThreshold = Param.Int(100, "SMT ROB Threshold Sharing Parameter") smtCommitPolicy = Param.String('RoundRobin', "SMT Commit Policy") + branchPred = Param.BPredUnit(BPredUnit(), "Branch Predictor") + def addPrivateSplitL1Caches(self, ic, dc): BaseCPU.addPrivateSplitL1Caches(self, ic, dc) self.icache.tgts_per_mshr = 20 diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/SConscript --- a/src/cpu/o3/SConscript Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/SConscript Fri Jul 16 20:48:56 2010 +0100 @@ -43,7 +43,6 @@ SimObject('O3CPU.py') Source('base_dyn_inst.cc') - Source('bpred_unit.cc') Source('commit.cc') Source('cpu.cc') Source('cpu_builder.cc') diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/bpred_unit.hh --- a/src/cpu/o3/bpred_unit.hh Thu Jul 08 14:33:56 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,264 +0,0 @@ -/* - * Copyright (c) 2004-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#ifndef __CPU_O3_BPRED_UNIT_HH__ -#define __CPU_O3_BPRED_UNIT_HH__ - -#include - -#include "base/statistics.hh" -#include "base/types.hh" -#include "cpu/inst_seq.hh" -#include "cpu/pred/2bit_local.hh" -#include "cpu/pred/btb.hh" -#include "cpu/pred/ras.hh" -#include "cpu/pred/tournament.hh" - -class DerivO3CPUParams; - -/** - * Basically a wrapper class to hold both the branch predictor - * and the BTB. - */ -template -class BPredUnit -{ - private: - typedef typename Impl::DynInstPtr DynInstPtr; - - enum PredType { - Local, - Tournament - }; - - PredType predictor; - - const std::string _name; - - public: - - /** - * @param params The params object, that has the size of the BP and BTB. - */ - BPredUnit(DerivO3CPUParams *params); - - const std::string &name() const { return _name; } - - /** - * Registers statistics. - */ - void regStats(); - - void switchOut(); - - void takeOverFrom(); - - /** - * Predicts whether or not the instruction is a taken branch, and the - * target of the branch if it is taken. - * @param inst The branch instruction. - * @param PC The predicted PC is passed back through this parameter. - * @param tid The thread id. - * @return Returns if the branch is taken or not. - */ - bool predict(DynInstPtr &inst, Addr &PC, ThreadID tid); - - // @todo: Rename this function. - void BPUncond(void * &bp_history); - - /** - * Tells the branch predictor to commit any updates until the given - * sequence number. - * @param done_sn The sequence number to commit any older updates up until. - * @param tid The thread id. - */ - void update(const InstSeqNum &done_sn, ThreadID tid); - - /** - * Squashes all outstanding updates until a given sequence number. - * @param squashed_sn The sequence number to squash any younger updates up - * until. - * @param tid The thread id. - */ - void squash(const InstSeqNum &squashed_sn, ThreadID tid); - - /** - * Squashes all outstanding updates until a given sequence number, and - * corrects that sn's update with the proper address and taken/not taken. - * @param squashed_sn The sequence number to squash any younger updates up - * until. - * @param corr_target The correct branch target. - * @param actually_taken The correct branch direction. - * @param tid The thread id. - */ - void squash(const InstSeqNum &squashed_sn, const Addr &corr_target, - bool actually_taken, ThreadID tid); - - /** - * @param bp_history Pointer to the history object. The predictor - * will need to update any state and delete the object. - */ - void BPSquash(void *bp_history); - - /** - * Looks up a given PC in the BP to see if it is taken or not taken. - * @param inst_PC The PC to look up. - * @param bp_history Pointer that will be set to an object that - * has the branch predictor state associated with the lookup. - * @return Whether the branch is taken or not taken. - */ - bool BPLookup(Addr &inst_PC, void * &bp_history); - - /** - * Looks up a given PC in the BTB to see if a matching entry exists. - * @param inst_PC The PC to look up. - * @return Whether the BTB contains the given PC. - */ - bool BTBValid(Addr &inst_PC) - { return BTB.valid(inst_PC, 0); } - - /** - * Looks up a given PC in the BTB to get the predicted target. - * @param inst_PC The PC to look up. - * @return The address of the target of the branch. - */ - Addr BTBLookup(Addr &inst_PC) - { return BTB.lookup(inst_PC, 0); } - - /** - * Updates the BP with taken/not taken information. - * @param inst_PC The branch's PC that will be updated. - * @param taken Whether the branch was taken or not taken. - * @param bp_history Pointer to the branch predictor state that is - * associated with the branch lookup that is being updated. - * @todo Make this update flexible enough to handle a global predictor. - */ - void BPUpdate(Addr &inst_PC, bool taken, void *bp_history); - - /** - * Updates the BTB with the target of a branch. - * @param inst_PC The branch's PC that will be updated. - * @param target_PC The branch's target that will be added to the BTB. - */ - void BTBUpdate(Addr &inst_PC, Addr &target_PC) - { BTB.update(inst_PC, target_PC,0); } - - void dump(); - - private: - struct PredictorHistory { - /** - * Makes a predictor history struct that contains any - * information needed to update the predictor, BTB, and RAS. - */ - PredictorHistory(const InstSeqNum &seq_num, const Addr &inst_PC, - bool pred_taken, void *bp_history, - ThreadID _tid) - : seqNum(seq_num), PC(inst_PC), RASTarget(0), - RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), - wasCall(0), bpHistory(bp_history) - { } - - bool operator==(const PredictorHistory &entry) const { - return this->seqNum == entry.seqNum; - } - - /** The sequence number for the predictor history entry. */ - InstSeqNum seqNum; - - /** The PC associated with the sequence number. */ - Addr PC; - - /** The RAS target (only valid if a return). */ - Addr RASTarget; - - /** The RAS index of the instruction (only valid if a call). */ - unsigned RASIndex; - - /** The thread id. */ - ThreadID tid; - - /** Whether or not it was predicted taken. */ - bool predTaken; - - /** Whether or not the RAS was used. */ - bool usedRAS; - - /** Whether or not the instruction was a call. */ - bool wasCall; - - /** Pointer to the history object passed back from the branch - * predictor. It is used to update or restore state of the - * branch predictor. - */ - void *bpHistory; - }; - - typedef std::list History; - typedef typename History::iterator HistoryIt; - - /** - * The per-thread predictor history. This is used to update the predictor - * as instructions are committed, or restore it to the proper state after - * a squash. - */ - History predHist[Impl::MaxThreads]; - - /** The local branch predictor. */ - LocalBP *localBP; - - /** The tournament branch predictor. */ - TournamentBP *tournamentBP; - - /** The BTB. */ - DefaultBTB BTB; - - /** The per-thread return address stack. */ - ReturnAddrStack RAS[Impl::MaxThreads]; - - /** Stat for number of BP lookups. */ - Stats::Scalar lookups; - /** Stat for number of conditional branches predicted. */ - Stats::Scalar condPredicted; - /** Stat for number of conditional branches predicted incorrectly. */ - Stats::Scalar condIncorrect; - /** Stat for number of BTB lookups. */ - Stats::Scalar BTBLookups; - /** Stat for number of BTB hits. */ - Stats::Scalar BTBHits; - /** Stat for number of times the BTB is correct. */ - Stats::Scalar BTBCorrect; - /** Stat for number of times the RAS is used to get a target. */ - Stats::Scalar usedRAS; - /** Stat for number of times the RAS is incorrect. */ - Stats::Scalar RASIncorrect; -}; - -#endif // __CPU_O3_BPRED_UNIT_HH__ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/bpred_unit.cc --- a/src/cpu/o3/bpred_unit.cc Thu Jul 08 14:33:56 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2004-2006 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#include "cpu/o3/bpred_unit_impl.hh" -#include "cpu/o3/isa_specific.hh" - -template class BPredUnit; diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/bpred_unit_impl.hh --- a/src/cpu/o3/bpred_unit_impl.hh Thu Jul 08 14:33:56 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,448 +0,0 @@ -/* - * Copyright (c) 2004-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#include - -#include "arch/types.hh" -#include "arch/isa_traits.hh" -#include "base/trace.hh" -#include "base/traceflags.hh" -#include "config/the_isa.hh" -#include "cpu/o3/bpred_unit.hh" -#include "params/DerivO3CPU.hh" - -template -BPredUnit::BPredUnit(DerivO3CPUParams *params) - : _name(params->name + ".BPredUnit"), - BTB(params->BTBEntries, - params->BTBTagSize, - params->instShiftAmt) -{ - // Setup the selected predictor. - if (params->predType == "local") { - localBP = new LocalBP(params->localPredictorSize, - params->localCtrBits, - params->instShiftAmt); - predictor = Local; - } else if (params->predType == "tournament") { - tournamentBP = new TournamentBP(params->localPredictorSize, - params->localCtrBits, - params->localHistoryTableSize, - params->localHistoryBits, - params->globalPredictorSize, - params->globalHistoryBits, - params->globalCtrBits, - params->choicePredictorSize, - params->choiceCtrBits, - params->instShiftAmt); - predictor = Tournament; - } else { - fatal("Invalid BP selected!"); - } - - for (int i=0; i < Impl::MaxThreads; i++) - RAS[i].init(params->RASSize); -} - -template -void -BPredUnit::regStats() -{ - lookups - .name(name() + ".lookups") - .desc("Number of BP lookups") - ; - - condPredicted - .name(name() + ".condPredicted") - .desc("Number of conditional branches predicted") - ; - - condIncorrect - .name(name() + ".condIncorrect") - .desc("Number of conditional branches incorrect") - ; - - BTBLookups - .name(name() + ".BTBLookups") - .desc("Number of BTB lookups") - ; - - BTBHits - .name(name() + ".BTBHits") - .desc("Number of BTB hits") - ; - - BTBCorrect - .name(name() + ".BTBCorrect") - .desc("Number of correct BTB predictions (this stat may not " - "work properly.") - ; - - usedRAS - .name(name() + ".usedRAS") - .desc("Number of times the RAS was used to get a target.") - ; - - RASIncorrect - .name(name() + ".RASInCorrect") - .desc("Number of incorrect RAS predictions.") - ; -} - -template -void -BPredUnit::switchOut() -{ - // Clear any state upon switch out. - for (int i = 0; i < Impl::MaxThreads; ++i) { - squash(0, i); - } -} - -template -void -BPredUnit::takeOverFrom() -{ - // Can reset all predictor state, but it's not necessarily better - // than leaving it be. -/* - for (int i = 0; i < Impl::MaxThreads; ++i) - RAS[i].reset(); - - BP.reset(); - BTB.reset(); -*/ -} - -template -bool -BPredUnit::predict(DynInstPtr &inst, Addr &PC, ThreadID tid) -{ - // See if branch predictor predicts taken. - // If so, get its target addr either from the BTB or the RAS. - // Save off record of branch stuff so the RAS can be fixed - // up once it's done. - - using TheISA::MachInst; - - bool pred_taken = false; - Addr target = PC; - - ++lookups; - - void *bp_history = NULL; - - if (inst->isUncondCtrl()) { - DPRINTF(Fetch, "BranchPred: [tid:%i]: Unconditional control.\n", tid); - pred_taken = true; - // Tell the BP there was an unconditional branch. - BPUncond(bp_history); - } else { - ++condPredicted; - - pred_taken = BPLookup(PC, bp_history); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Branch predictor predicted %i " - "for PC %#x\n", - tid, pred_taken, inst->readPC()); - } - - DPRINTF(Fetch, "BranchPred: [tid:%i]: [sn:%i] Creating prediction history " - "for PC %#x\n", - tid, inst->seqNum, inst->readPC()); - - PredictorHistory predict_record(inst->seqNum, PC, pred_taken, - bp_history, tid); - - // Now lookup in the BTB or RAS. - if (pred_taken) { - if (inst->isReturn()) { - ++usedRAS; - - // If it's a function return call, then look up the address - // in the RAS. - target = RAS[tid].top(); - - // Record the top entry of the RAS, and its index. - predict_record.usedRAS = true; - predict_record.RASIndex = RAS[tid].topIdx(); - predict_record.RASTarget = target; - - assert(predict_record.RASIndex < 16); - - RAS[tid].pop(); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x is a return, " - "RAS predicted target: %#x, RAS index: %i.\n", - tid, inst->readPC(), target, predict_record.RASIndex); - } else { - ++BTBLookups; - - if (inst->isCall()) { -#if ISA_HAS_DELAY_SLOT - Addr ras_pc = PC + (2 * sizeof(MachInst)); // Next Next PC -#else - Addr ras_pc = PC + sizeof(MachInst); // Next PC -#endif - RAS[tid].push(ras_pc); - - // Record that it was a call so that the top RAS entry can - // be popped off if the speculation is incorrect. - predict_record.wasCall = true; - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x was a call" - ", adding %#x to the RAS index: %i.\n", - tid, inst->readPC(), ras_pc, RAS[tid].topIdx()); - } - - if (BTB.valid(PC, tid)) { - ++BTBHits; - - // If it's not a return, use the BTB to get the target addr. - target = BTB.lookup(PC, tid); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x predicted" - " target is %#x.\n", - tid, inst->readPC(), target); - - } else { - DPRINTF(Fetch, "BranchPred: [tid:%i]: BTB doesn't have a " - "valid entry.\n",tid); - pred_taken = false; - } - - } - } - - PC = target; - - predHist[tid].push_front(predict_record); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: [sn:%i]: History entry added." - "predHist.size(): %i\n", tid, inst->seqNum, predHist[tid].size()); - - return pred_taken; -} - -template -void -BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid) -{ - DPRINTF(Fetch, "BranchPred: [tid:%i]: Committing branches until " - "[sn:%lli].\n", tid, done_sn); - - while (!predHist[tid].empty() && - predHist[tid].back().seqNum <= done_sn) { - // Update the branch predictor with the correct results. - BPUpdate(predHist[tid].back().PC, - predHist[tid].back().predTaken, - predHist[tid].back().bpHistory); - - predHist[tid].pop_back(); - } -} - -template -void -BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid) -{ - History &pred_hist = predHist[tid]; - - while (!pred_hist.empty() && - pred_hist.front().seqNum > squashed_sn) { - if (pred_hist.front().usedRAS) { - DPRINTF(Fetch, "BranchPred: [tid:%i]: Restoring top of RAS to: %i," - " target: %#x.\n", - tid, - pred_hist.front().RASIndex, - pred_hist.front().RASTarget); - - RAS[tid].restore(pred_hist.front().RASIndex, - pred_hist.front().RASTarget); - } else if (pred_hist.front().wasCall) { - DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing speculative entry " - "added to the RAS.\n",tid); - - RAS[tid].pop(); - } - - // This call should delete the bpHistory. - BPSquash(pred_hist.front().bpHistory); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing history for [sn:%i] " - "PC %#x.\n", tid, pred_hist.front().seqNum, pred_hist.front().PC); - - pred_hist.pop_front(); - - DPRINTF(Fetch, "[tid:%i]: predHist.size(): %i\n", tid, predHist[tid].size()); - } - -} - -template -void -BPredUnit::squash(const InstSeqNum &squashed_sn, - const Addr &corr_target, - bool actually_taken, - ThreadID tid) -{ - // Now that we know that a branch was mispredicted, we need to undo - // all the branches that have been seen up until this branch and - // fix up everything. - // NOTE: This should be call conceivably in 2 scenarios: - // (1) After an branch is executed, it updates its status in the ROB - // The commit stage then checks the ROB update and sends a signal to - // the fetch stage to squash history after the mispredict - // (2) In the decode stage, you can find out early if a unconditional - // PC-relative, branch was predicted incorrectly. If so, a signal - // to the fetch stage is sent to squash history after the mispredict - - History &pred_hist = predHist[tid]; - - ++condIncorrect; - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Squashing from sequence number %i, " - "setting target to %#x.\n", - tid, squashed_sn, corr_target); - - // Squash All Branches AFTER this mispredicted branch - squash(squashed_sn, tid); - - // If there's a squash due to a syscall, there may not be an entry - // corresponding to the squash. In that case, don't bother trying to - // fix up the entry. - if (!pred_hist.empty()) { - - HistoryIt hist_it = pred_hist.begin(); - //HistoryIt hist_it = find(pred_hist.begin(), pred_hist.end(), - // squashed_sn); - - //assert(hist_it != pred_hist.end()); - if (pred_hist.front().seqNum != squashed_sn) { - DPRINTF(Fetch, "Front sn %i != Squash sn %i\n", - pred_hist.front().seqNum, squashed_sn); - - assert(pred_hist.front().seqNum == squashed_sn); - } - - - if ((*hist_it).usedRAS) { - ++RASIncorrect; - } - - BPUpdate((*hist_it).PC, actually_taken, - pred_hist.front().bpHistory); - - BTB.update((*hist_it).PC, corr_target, tid); - - DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing history for [sn:%i] " - "PC %#x.\n", tid, (*hist_it).seqNum, (*hist_it).PC); - - pred_hist.erase(hist_it); - - DPRINTF(Fetch, "[tid:%i]: predHist.size(): %i\n", tid, predHist[tid].size()); - } -} - -template -void -BPredUnit::BPUncond(void * &bp_history) -{ - // Only the tournament predictor cares about unconditional branches. - if (predictor == Tournament) { - tournamentBP->uncondBr(bp_history); - } -} - -template -void -BPredUnit::BPSquash(void *bp_history) -{ - if (predictor == Local) { - localBP->squash(bp_history); - } else if (predictor == Tournament) { - tournamentBP->squash(bp_history); - } else { - panic("Predictor type is unexpected value!"); - } -} - -template -bool -BPredUnit::BPLookup(Addr &inst_PC, void * &bp_history) -{ - if (predictor == Local) { - return localBP->lookup(inst_PC, bp_history); - } else if (predictor == Tournament) { - return tournamentBP->lookup(inst_PC, bp_history); - } else { - panic("Predictor type is unexpected value!"); - } -} - -template -void -BPredUnit::BPUpdate(Addr &inst_PC, bool taken, void *bp_history) -{ - if (predictor == Local) { - localBP->update(inst_PC, taken, bp_history); - } else if (predictor == Tournament) { - tournamentBP->update(inst_PC, taken, bp_history); - } else { - panic("Predictor type is unexpected value!"); - } -} - -template -void -BPredUnit::dump() -{ - HistoryIt pred_hist_it; - - for (int i = 0; i < Impl::MaxThreads; ++i) { - if (!predHist[i].empty()) { - pred_hist_it = predHist[i].begin(); - - cprintf("predHist[%i].size(): %i\n", i, predHist[i].size()); - - while (pred_hist_it != predHist[i].end()) { - cprintf("[sn:%lli], PC:%#x, tid:%i, predTaken:%i, " - "bpHistory:%#x\n", - (*pred_hist_it).seqNum, (*pred_hist_it).PC, - (*pred_hist_it).tid, (*pred_hist_it).predTaken, - (*pred_hist_it).bpHistory); - pred_hist_it++; - } - - cprintf("\n"); - } - } -} diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/cpu_builder.cc --- a/src/cpu/o3/cpu_builder.cc Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/cpu_builder.cc Fri Jul 16 20:48:56 2010 +0100 @@ -75,7 +75,5 @@ else smtFetchPolicy = smtFetchPolicy; - instShiftAmt = 2; - return new DerivO3CPU(this); } diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/cpu_policy.hh --- a/src/cpu/o3/cpu_policy.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/cpu_policy.hh Fri Jul 16 20:48:56 2010 +0100 @@ -31,7 +31,6 @@ #ifndef __CPU_O3_CPU_POLICY_HH__ #define __CPU_O3_CPU_POLICY_HH__ -#include "cpu/o3/bpred_unit.hh" #include "cpu/o3/free_list.hh" #include "cpu/o3/inst_queue.hh" #include "cpu/o3/lsq.hh" @@ -62,10 +61,6 @@ template struct SimpleCPUPolicy { - /** Typedef for the branch prediction unit (which includes the BP, - * RAS, and BTB). - */ - typedef ::BPredUnit BPredUnit; /** Typedef for the register file. Most classes assume a unified * physical register file. */ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/fetch.hh --- a/src/cpu/o3/fetch.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/fetch.hh Fri Jul 16 20:48:56 2010 +0100 @@ -38,6 +38,7 @@ #include "base/timebuf.hh" #include "config/the_isa.hh" #include "cpu/pc_event.hh" +#include "cpu/pred/bpred_unit.hh" #include "mem/packet.hh" #include "mem/port.hh" #include "sim/eventq.hh" @@ -63,7 +64,6 @@ typedef typename Impl::O3CPU O3CPU; /** Typedefs from the CPU policy. */ - typedef typename CPUPol::BPredUnit BPredUnit; typedef typename CPUPol::FetchStruct FetchStruct; typedef typename CPUPol::TimeStruct TimeStruct; @@ -344,7 +344,7 @@ IcachePort *icachePort; /** BPredUnit. */ - BPredUnit branchPred; + BPredUnit *branchPred; /** Predecoder. */ TheISA::Predecoder predecoder; diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/fetch_impl.hh --- a/src/cpu/o3/fetch_impl.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/o3/fetch_impl.hh Fri Jul 16 20:48:56 2010 +0100 @@ -116,7 +116,6 @@ template DefaultFetch::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params) : cpu(_cpu), - branchPred(params), predecoder(NULL), decodeToFetchDelay(params->decodeToFetchDelay), renameToFetchDelay(params->renameToFetchDelay), @@ -176,6 +175,9 @@ icachePort->snoopRangeSent = false; + // Link to the created branch predictor. + branchPred = params->branchPred; + #if USE_CHECKER if (cpu->checker) { cpu->checker->setIcachePort(icachePort); @@ -276,8 +278,6 @@ .desc("Number of inst fetches per cycle") .flags(Stats::total); fetchRate = fetchedInsts / cpu->numCycles; - - branchPred.regStats(); } template @@ -431,8 +431,6 @@ DefaultFetch::switchOut() { switchedOut = true; - // Branch predictor needs to have its state cleared. - branchPred.switchOut(); } template @@ -455,7 +453,6 @@ _status = Inactive; switchedOut = false; interruptPending = false; - branchPred.takeOverFrom(); } template @@ -523,7 +520,8 @@ ThreadID tid = inst->threadNumber; Addr pred_PC = next_PC; - predict_taken = branchPred.predict(inst, pred_PC, tid); + predict_taken = + branchPred->predict(inst->staticInst, inst->seqNum, pred_PC, tid); if (predict_taken) { DPRINTF(Fetch, "[tid:%i]: [sn:%i]: Branch predicted to be taken to %#x.\n", @@ -911,20 +909,20 @@ // Also check if there's a mispredict that happened. if (fromCommit->commitInfo[tid].branchMispredict) { - branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum, - fromCommit->commitInfo[tid].nextPC, - fromCommit->commitInfo[tid].branchTaken, - tid); + branchPred->squash(fromCommit->commitInfo[tid].doneSeqNum, + fromCommit->commitInfo[tid].nextPC, + fromCommit->commitInfo[tid].branchTaken, + tid); } else { - branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum, - tid); + branchPred->squash(fromCommit->commitInfo[tid].doneSeqNum, + tid); } return true; } else if (fromCommit->commitInfo[tid].doneSeqNum) { // Update the branch predictor if it wasn't a squashed instruction // that was broadcasted. - branchPred.update(fromCommit->commitInfo[tid].doneSeqNum, tid); + branchPred->update(fromCommit->commitInfo[tid].doneSeqNum, tid); } // Check ROB squash signals from commit. @@ -944,13 +942,13 @@ // Update the branch predictor. if (fromDecode->decodeInfo[tid].branchMispredict) { - branchPred.squash(fromDecode->decodeInfo[tid].doneSeqNum, - fromDecode->decodeInfo[tid].nextPC, - fromDecode->decodeInfo[tid].branchTaken, - tid); + branchPred->squash(fromDecode->decodeInfo[tid].doneSeqNum, + fromDecode->decodeInfo[tid].nextPC, + fromDecode->decodeInfo[tid].branchTaken, + tid); } else { - branchPred.squash(fromDecode->decodeInfo[tid].doneSeqNum, - tid); + branchPred->squash(fromDecode->decodeInfo[tid].doneSeqNum, + tid); } if (fetchStatus[tid] != Squashing) { diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/sat_counter.hh --- a/src/cpu/o3/sat_counter.hh Thu Jul 08 14:33:56 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2005-2006 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#ifndef __CPU_O3_SAT_COUNTER_HH__ -#define __CPU_O3_SAT_COUNTER_HH__ - -#include "base/misc.hh" -#include "base/types.hh" - -/** - * Private counter class for the internal saturating counters. - * Implements an n bit saturating counter and provides methods to - * increment, decrement, and read it. - * @todo Consider making this something that more closely mimics a - * built in class so you can use ++ or --. - */ -class SatCounter -{ - public: - /** - * Constructor for the counter. - */ - SatCounter() - : initialVal(0), counter(0) - { } - - /** - * Constructor for the counter. - * @param bits How many bits the counter will have. - */ - SatCounter(unsigned bits) - : initialVal(0), maxVal((1 << bits) - 1), counter(0) - { } - - /** - * Constructor for the counter. - * @param bits How many bits the counter will have. - * @param initial_val Starting value for each counter. - */ - SatCounter(unsigned bits, uint8_t initial_val) - : initialVal(initialVal), maxVal((1 << bits) - 1), counter(initial_val) - { - // Check to make sure initial value doesn't exceed the max - // counter value. - if (initial_val > maxVal) { - fatal("BP: Initial counter value exceeds max size."); - } - } - - /** - * Sets the number of bits. - */ - void setBits(unsigned bits) { maxVal = (1 << bits) - 1; } - - void reset() { counter = initialVal; } - - /** - * Increments the counter's current value. - */ - void increment() - { - if (counter < maxVal) { - ++counter; - } - } - - /** - * Decrements the counter's current value. - */ - void decrement() - { - if (counter > 0) { - --counter; - } - } - - /** - * Read the counter's value. - */ - const uint8_t read() const - { return counter; } - - private: - uint8_t initialVal; - uint8_t maxVal; - uint8_t counter; -}; - -#endif // __CPU_O3_SAT_COUNTER_HH__ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/o3/sat_counter.cc --- a/src/cpu/o3/sat_counter.cc Thu Jul 08 14:33:56 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#include "base/misc.hh" -#include "cpu/o3/sat_counter.hh" - -SatCounter::SatCounter() - : initialVal(0), counter(0) -{ -} - -SatCounter::SatCounter(unsigned bits) - : initialVal(0), maxVal((1 << bits) - 1), counter(0) -{ -} - -SatCounter::SatCounter(unsigned bits, uint8_t initial_val) - : initialVal(initialVal), maxVal((1 << bits) - 1), counter(initial_val) -{ - // Check to make sure initial value doesn't exceed the max counter value. - if (initial_val > maxVal) { - fatal("BP: Initial counter value exceeds max size."); - } -} - -void -SatCounter::setBits(unsigned bits) -{ - maxVal = (1 << bits) - 1; -} diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/2bit_local.hh --- a/src/cpu/pred/2bit_local.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/2bit_local.hh Fri Jul 16 20:48:56 2010 +0100 @@ -1,5 +1,6 @@ /* * Copyright (c) 2004-2006 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,15 +27,17 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Timothy M. Jones */ -#ifndef __CPU_O3_2BIT_LOCAL_PRED_HH__ -#define __CPU_O3_2BIT_LOCAL_PRED_HH__ +#ifndef __CPU_PRED_2BIT_LOCAL_PRED_HH__ +#define __CPU_PRED_2BIT_LOCAL_PRED_HH__ #include #include "base/types.hh" -#include "cpu/o3/sat_counter.hh" +#include "cpu/pred/bpred_unit.hh" +#include "cpu/pred/sat_counter.hh" /** * Implements a local predictor that uses the PC to index into a table of @@ -43,17 +46,14 @@ * predictor state that needs to be recorded or updated; the update can be * determined solely by the branch being taken or not taken. */ -class LocalBP +class LocalBP : public BPredUnit { public: /** * Default branch predictor constructor. - * @param localPredictorSize Size of the local predictor. - * @param localCtrBits Number of bits per counter. - * @param instShiftAmt Offset amount for instructions to ignore alignment. + * @param params The object's parameters. */ - LocalBP(unsigned localPredictorSize, unsigned localCtrBits, - unsigned instShiftAmt); + LocalBP(const Params *params); /** * Looks up the given address in the branch predictor and returns @@ -62,16 +62,16 @@ * @param bp_history Pointer to any bp history state. * @return Whether or not the branch is taken. */ - bool lookup(Addr &branch_addr, void * &bp_history); + virtual bool BPLookup(Addr &branch_addr, void * &bp_history); /** * Updates the branch predictor with the actual result of a branch. * @param branch_addr The address of the branch to update. * @param taken Whether or not the branch was taken. */ - void update(Addr &branch_addr, bool taken, void *bp_history); + virtual void BPUpdate(Addr &branch_addr, bool taken, void *bp_history); - void squash(void *bp_history) + virtual void BPSquash(void *bp_history) { assert(bp_history == NULL); } void reset(); @@ -107,4 +107,4 @@ unsigned indexMask; }; -#endif // __CPU_O3_2BIT_LOCAL_PRED_HH__ +#endif // __CPU_PRED_2BIT_LOCAL_PRED_HH__ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/2bit_local.cc --- a/src/cpu/pred/2bit_local.cc Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/2bit_local.cc Fri Jul 16 20:48:56 2010 +0100 @@ -1,5 +1,6 @@ /* * Copyright (c) 2004-2006 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,6 +27,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Timothy M. Jones */ #include "base/intmath.hh" @@ -33,12 +35,11 @@ #include "base/trace.hh" #include "cpu/pred/2bit_local.hh" -LocalBP::LocalBP(unsigned _localPredictorSize, - unsigned _localCtrBits, - unsigned _instShiftAmt) - : localPredictorSize(_localPredictorSize), - localCtrBits(_localCtrBits), - instShiftAmt(_instShiftAmt) +LocalBP::LocalBP(const Params *params) + : BPredUnit(params), + localPredictorSize(params->localPredictorSize), + localCtrBits(params->localCtrBits), + instShiftAmt(params->instShiftAmt) { if (!isPowerOf2(localPredictorSize)) { fatal("Invalid local predictor size!\n"); @@ -59,7 +60,7 @@ localCtrs.resize(localPredictorSets); for (unsigned i = 0; i < localPredictorSets; ++i) - localCtrs[i].setBits(_localCtrBits); + localCtrs[i].setBits(localCtrBits); DPRINTF(Fetch, "Branch predictor: local predictor size: %i\n", localPredictorSize); @@ -79,7 +80,7 @@ } bool -LocalBP::lookup(Addr &branch_addr, void * &bp_history) +LocalBP::BPLookup(Addr &branch_addr, void * &bp_history) { bool taken; uint8_t counter_val; @@ -110,7 +111,7 @@ } void -LocalBP::update(Addr &branch_addr, bool taken, void *bp_history) +LocalBP::BPUpdate(Addr &branch_addr, bool taken, void *bp_history) { assert(bp_history == NULL); unsigned local_predictor_idx; diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/SConscript --- a/src/cpu/pred/SConscript Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/SConscript Fri Jul 16 20:48:56 2010 +0100 @@ -31,6 +31,8 @@ Import('*') if 'InOrderCPU' in env['CPU_MODELS'] or 'O3CPU' in env['CPU_MODELS']: + SimObject('BPredUnit.py') + Source('bpred_unit.cc') Source('2bit_local.cc') Source('btb.cc') Source('ras.cc') diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/bpred_unit.hh --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/pred/bpred_unit.hh Fri Jul 16 20:48:56 2010 +0100 @@ -0,0 +1,234 @@ +/* + * Copyright (c) 2004-2005 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Kevin Lim + * Timothy M. Jones + */ + +#ifndef __CPU_PRED_BPRED_UNIT_HH__ +#define __CPU_PRED_BPRED_UNIT_HH__ + +#include + +#include "base/statistics.hh" +#include "base/types.hh" +#include "cpu/inst_seq.hh" +#include "cpu/pred/btb.hh" +#include "cpu/pred/ras.hh" +#include "cpu/static_inst.hh" +#include "params/BPredUnit.hh" +#include "sim/sim_object.hh" + +/** + * A branch predictor class that implements the whole predictor including + * RAS and BTB. + */ +class BPredUnit : public SimObject +{ + public: + typedef BPredUnitParams Params; + + /** + * @param params The params object, that has the size of the BP. + */ + BPredUnit(const Params *p); + + ~BPredUnit(); + + /** + * Registers statistics. + */ + void regStats(); + + /** + * Predicts whether or not the instruction is a taken branch, and the + * target of the branch if it is taken. + * @param inst The branch instruction. + * @param seqNum The instruction's sequence number + * @param PC The predicted PC is passed back through this parameter. + * @param tid The thread id. + * @return Returns if the branch is taken or not. + */ + bool predict(StaticInstPtr &inst, const InstSeqNum &seqNum, Addr &PC, + ThreadID tid); + + // @todo: Rename this function. + virtual void + BPUncond(void * &bp_history) + { } + + /** + * Tells the branch predictor to commit any updates until the given + * sequence number. + * @param done_sn The sequence number to commit any older updates up until. + * @param tid The thread id. + */ + void update(const InstSeqNum &done_sn, ThreadID tid); + + /** + * Squashes all outstanding updates until a given sequence number. + * @param squashed_sn The sequence number to squash any younger updates up + * until. + * @param tid The thread id. + */ + void squash(const InstSeqNum &squashed_sn, ThreadID tid); + + /** + * Squashes all outstanding updates until a given sequence number, and + * corrects that sn's update with the proper address and taken/not taken. + * @param squashed_sn The sequence number to squash any younger updates up + * until. + * @param corr_target The correct branch target. + * @param actually_taken The correct branch direction. + * @param tid The thread id. + */ + void squash(const InstSeqNum &squashed_sn, const Addr &corr_target, + bool actually_taken, ThreadID tid); + + /** + * @param bp_history Pointer to the history object. The predictor + * will need to update any state and delete the object. + */ + virtual void + BPSquash(void *bp_history) + { } + + /** + * Looks up a given PC in the BP to see if it is taken or not taken. + * @param inst_PC The PC to look up. + * @param bp_history Pointer that will be set to an object that + * has the branch predictor state associated with the lookup. + * @return Whether the branch is taken or not taken. + */ + virtual bool + BPLookup(Addr &inst_PC, void * &bp_history) + { + return true; + } + + /** + * Updates the BP with taken/not taken information. + * @param inst_PC The branch's PC that will be updated. + * @param taken Whether the branch was taken or not taken. + * @param bp_history Pointer to the branch predictor state that is + * associated with the branch lookup that is being updated. + * @todo Make this update flexible enough to handle a global predictor. + */ + virtual void + BPUpdate(Addr &inst_PC, bool taken, void *bp_history) + { } + + void dump(); + + private: + struct PredictorHistory { + /** + * Makes a predictor history struct that contains any + * information needed to update the predictor, BTB, and RAS. + */ + PredictorHistory(const InstSeqNum &seq_num, const Addr &inst_PC, + bool pred_taken, void *bp_history, + ThreadID _tid) + : seqNum(seq_num), PC(inst_PC), RASTarget(0), + RASIndex(0), tid(_tid), predTaken(pred_taken), usedRAS(0), + wasCall(0), bpHistory(bp_history) + { } + + bool operator==(const PredictorHistory &entry) const { + return this->seqNum == entry.seqNum; + } + + /** The sequence number for the predictor history entry. */ + InstSeqNum seqNum; + + /** The PC associated with the sequence number. */ + Addr PC; + + /** The RAS target (only valid if a return). */ + Addr RASTarget; + + /** The RAS index of the instruction (only valid if a call). */ + unsigned RASIndex; + + /** The thread id. */ + ThreadID tid; + + /** Whether or not it was predicted taken. */ + bool predTaken; + + /** Whether or not the RAS was used. */ + bool usedRAS; + + /** Whether or not the instruction was a call. */ + bool wasCall; + + /** Pointer to the history object passed back from the branch + * predictor. It is used to update or restore state of the + * branch predictor. + */ + void *bpHistory; + }; + + typedef std::list History; + typedef History::iterator HistoryIt; + + /** The number of threads supported. */ + unsigned numThreads; + + /** + * The per-thread predictor history. This is used to update the predictor + * as instructions are committed, or restore it to the proper state after + * a squash. + */ + History *predHist; + + /** The BTB. */ + DefaultBTB BTB; + + /** The per-thread return address stack. */ + ReturnAddrStack *RAS; + + /** Stat for number of BP lookups. */ + Stats::Scalar lookups; + /** Stat for number of conditional branches predicted. */ + Stats::Scalar condPredicted; + /** Stat for number of conditional branches predicted incorrectly. */ + Stats::Scalar condIncorrect; + /** Stat for number of BTB lookups. */ + Stats::Scalar BTBLookups; + /** Stat for number of BTB hits. */ + Stats::Scalar BTBHits; + /** Stat for number of times the BTB is correct. */ + Stats::Scalar BTBCorrect; + /** Stat for number of times the RAS is used to get a target. */ + Stats::Scalar usedRAS; + /** Stat for number of times the RAS is incorrect. */ + Stats::Scalar RASIncorrect; +}; + +#endif // __CPU_PRED_BPRED_UNIT_HH__ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/bpred_unit.cc --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/pred/bpred_unit.cc Fri Jul 16 20:48:56 2010 +0100 @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2004-2006 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Kevin Lim + * Timothy M. Jones + */ + +#include "cpu/pred/2bit_local.hh" +#include "cpu/pred/bpred_unit_impl.hh" +#include "cpu/pred/tournament.hh" +#include "params/BPredUnit.hh" + +BPredUnit * +BPredUnitParams::create() +{ + if (predType == "local") { + return new LocalBP(this); + } else if (predType == "tournament") { + return new TournamentBP(this); + } else { + fatal("Invalid BP selected!"); + } +} diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/bpred_unit_impl.hh --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cpu/pred/bpred_unit_impl.hh Fri Jul 16 20:48:56 2010 +0100 @@ -0,0 +1,358 @@ +/* + * Copyright (c) 2004-2005 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Kevin Lim + * Timothy M. Jones + */ + +#include + +#include "arch/types.hh" +#include "arch/isa_traits.hh" +#include "base/trace.hh" +#include "base/traceflags.hh" +#include "config/the_isa.hh" +#include "cpu/pred/bpred_unit.hh" +#include "cpu/static_inst.hh" + +BPredUnit::BPredUnit(const Params *params) + : SimObject(params), + BTB(params->BTBEntries, + params->BTBTagSize, + params->instShiftAmt) +{ + // Create per-thread structures. + numThreads = params->numThreads; + predHist = new History[numThreads]; + RAS = new ReturnAddrStack[numThreads]; + + for (int i=0; i < numThreads; i++) + RAS[i].init(params->RASSize); +} + +BPredUnit::~BPredUnit() +{ + delete[] RAS; + delete[] predHist; +} + +void +BPredUnit::regStats() +{ + lookups + .name(name() + ".lookups") + .desc("Number of BP lookups") + ; + + condPredicted + .name(name() + ".condPredicted") + .desc("Number of conditional branches predicted") + ; + + condIncorrect + .name(name() + ".condIncorrect") + .desc("Number of conditional branches incorrect") + ; + + BTBLookups + .name(name() + ".BTBLookups") + .desc("Number of BTB lookups") + ; + + BTBHits + .name(name() + ".BTBHits") + .desc("Number of BTB hits") + ; + + BTBCorrect + .name(name() + ".BTBCorrect") + .desc("Number of correct BTB predictions (this stat may not " + "work properly.") + ; + + usedRAS + .name(name() + ".usedRAS") + .desc("Number of times the RAS was used to get a target.") + ; + + RASIncorrect + .name(name() + ".RASInCorrect") + .desc("Number of incorrect RAS predictions.") + ; +} + +bool +BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum, + Addr &PC, ThreadID tid) +{ + // See if branch predictor predicts taken. + // If so, get its target addr either from the BTB or the RAS. + // Save off record of branch stuff so the RAS can be fixed + // up once it's done. + + using TheISA::MachInst; + + bool pred_taken = false; + Addr target = PC; + + ++lookups; + + void *bp_history = NULL; + + if (inst->isUncondCtrl()) { + DPRINTF(Fetch, "BranchPred: [tid:%i]: Unconditional control.\n", tid); + pred_taken = true; + // Tell the BP there was an unconditional branch. + BPUncond(bp_history); + } else { + ++condPredicted; + + pred_taken = BPLookup(PC, bp_history); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Branch predictor predicted %i " + "for PC %#x\n", tid, pred_taken, PC); + } + + DPRINTF(Fetch, "BranchPred: [tid:%i]: [sn:%i] Creating prediction history " + "for PC %#x\n", tid, seqNum, PC); + + PredictorHistory predict_record(seqNum, PC, pred_taken, bp_history, tid); + + // Now lookup in the BTB or RAS. + if (pred_taken) { + if (inst->isReturn()) { + ++usedRAS; + + // If it's a function return call, then look up the address + // in the RAS. + target = RAS[tid].top(); + + // Record the top entry of the RAS, and its index. + predict_record.usedRAS = true; + predict_record.RASIndex = RAS[tid].topIdx(); + predict_record.RASTarget = target; + + assert(predict_record.RASIndex < RAS[tid].size()); + + RAS[tid].pop(); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x is a return," + " RAS predicted target: %#x, RAS index: %i.\n", + tid, PC, target, predict_record.RASIndex); + } else { + ++BTBLookups; + + if (inst->isCall()) { +#if ISA_HAS_DELAY_SLOT + Addr ras_pc = PC + (2 * sizeof(MachInst)); // Next Next PC +#else + Addr ras_pc = PC + sizeof(MachInst); // Next PC +#endif + RAS[tid].push(ras_pc); + + // Record that it was a call so that the top RAS entry can + // be popped off if the speculation is incorrect. + predict_record.wasCall = true; + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x was a " + "call, adding %#x to the RAS index: %i.\n", + tid, PC, ras_pc, RAS[tid].topIdx()); + } + + if (BTB.valid(PC, tid)) { + ++BTBHits; + + // If it's not a return, use the BTB to get the target addr. + target = BTB.lookup(PC, tid); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Instruction %#x " + "predicted target is %#x.\n", tid, PC, target); + + } else { + DPRINTF(Fetch, "BranchPred: [tid:%i]: BTB doesn't have a " + "valid entry.\n", tid); + pred_taken = false; + } + + } + } + + PC = target; + + predHist[tid].push_front(predict_record); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: [sn:%i]: History entry added." + " predHist.size(): %i\n", tid, seqNum, predHist[tid].size()); + + return pred_taken; +} + +void +BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid) +{ + DPRINTF(Fetch, "BranchPred: [tid:%i]: Committing branches until " + "[sn:%lli].\n", tid, done_sn); + + while (!predHist[tid].empty() && + predHist[tid].back().seqNum <= done_sn) { + // Update the branch predictor with the correct results. + BPUpdate(predHist[tid].back().PC, + predHist[tid].back().predTaken, + predHist[tid].back().bpHistory); + + predHist[tid].pop_back(); + } +} + +void +BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid) +{ + History &pred_hist = predHist[tid]; + + while (!pred_hist.empty() && + pred_hist.front().seqNum > squashed_sn) { + if (pred_hist.front().usedRAS) { + DPRINTF(Fetch, "BranchPred: [tid:%i]: Restoring top of RAS to: %i," + " target: %#x.\n", + tid, + pred_hist.front().RASIndex, + pred_hist.front().RASTarget); + + RAS[tid].restore(pred_hist.front().RASIndex, + pred_hist.front().RASTarget); + } else if (pred_hist.front().wasCall) { + DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing speculative entry " + "added to the RAS.\n",tid); + + RAS[tid].pop(); + } + + // This call should delete the bpHistory. + BPSquash(pred_hist.front().bpHistory); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing history for [sn:%i] " + "PC %#x.\n", tid, pred_hist.front().seqNum, + pred_hist.front().PC); + + pred_hist.pop_front(); + + DPRINTF(Fetch, "[tid:%i]: predHist.size(): %i\n", tid, + predHist[tid].size()); + } + +} + +void +BPredUnit::squash(const InstSeqNum &squashed_sn, + const Addr &corr_target, + bool actually_taken, + ThreadID tid) +{ + // Now that we know that a branch was mispredicted, we need to undo + // all the branches that have been seen up until this branch and + // fix up everything. + // NOTE: This should be call conceivably in 2 scenarios: + // (1) After an branch is executed, it updates its status in the ROB + // The commit stage then checks the ROB update and sends a signal to + // the fetch stage to squash history after the mispredict + // (2) In the decode stage, you can find out early if a unconditional + // PC-relative, branch was predicted incorrectly. If so, a signal + // to the fetch stage is sent to squash history after the mispredict + + History &pred_hist = predHist[tid]; + + ++condIncorrect; + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Squashing from sequence number %i, " + "setting target to %#x.\n", + tid, squashed_sn, corr_target); + + // Squash All Branches AFTER this mispredicted branch + squash(squashed_sn, tid); + + // If there's a squash due to a syscall, there may not be an entry + // corresponding to the squash. In that case, don't bother trying to + // fix up the entry. + if (!pred_hist.empty()) { + + HistoryIt hist_it = pred_hist.begin(); + //HistoryIt hist_it = find(pred_hist.begin(), pred_hist.end(), + // squashed_sn); + + //assert(hist_it != pred_hist.end()); + if (pred_hist.front().seqNum != squashed_sn) { + DPRINTF(Fetch, "Front sn %i != Squash sn %i\n", + pred_hist.front().seqNum, squashed_sn); + + assert(pred_hist.front().seqNum == squashed_sn); + } + + + if ((*hist_it).usedRAS) { + ++RASIncorrect; + } + + BPUpdate((*hist_it).PC, actually_taken, + pred_hist.front().bpHistory); + + BTB.update((*hist_it).PC, corr_target, tid); + + DPRINTF(Fetch, "BranchPred: [tid:%i]: Removing history for [sn:%i] " + "PC %#x.\n", tid, (*hist_it).seqNum, (*hist_it).PC); + + pred_hist.erase(hist_it); + + DPRINTF(Fetch, "[tid:%i]: predHist.size(): %i\n", tid, + predHist[tid].size()); + } +} + +void +BPredUnit::dump() +{ + HistoryIt pred_hist_it; + + for (int i = 0; i < numThreads; ++i) { + if (!predHist[i].empty()) { + pred_hist_it = predHist[i].begin(); + + cprintf("predHist[%i].size(): %i\n", i, predHist[i].size()); + + while (pred_hist_it != predHist[i].end()) { + cprintf("[sn:%lli], PC:%#x, tid:%i, predTaken:%i, " + "bpHistory:%#x\n", + (*pred_hist_it).seqNum, (*pred_hist_it).PC, + (*pred_hist_it).tid, (*pred_hist_it).predTaken, + (*pred_hist_it).bpHistory); + pred_hist_it++; + } + + cprintf("\n"); + } + } +} diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/ras.hh --- a/src/cpu/pred/ras.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/ras.hh Fri Jul 16 20:48:56 2010 +0100 @@ -72,9 +72,17 @@ */ void restore(unsigned top_entry_idx, const Addr &restored_target); - bool empty() { return usedEntries == 0; } + bool empty() { return usedEntries == 0; } - bool full() { return usedEntries == numEntries; } + bool full() { return usedEntries == numEntries; } + + /** Returns the size of the RAS. */ + unsigned + size() const + { + return numEntries; + } + private: /** Increments the top of stack index. */ inline void incrTos() diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/tournament.hh --- a/src/cpu/pred/tournament.hh Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/tournament.hh Fri Jul 16 20:48:56 2010 +0100 @@ -1,5 +1,6 @@ /* * Copyright (c) 2004-2006 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,15 +27,17 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Timothy M. Jones */ -#ifndef __CPU_O3_TOURNAMENT_PRED_HH__ -#define __CPU_O3_TOURNAMENT_PRED_HH__ +#ifndef __CPU_PRED_TOURNAMENT_PRED_HH__ +#define __CPU_PRED_TOURNAMENT_PRED_HH__ #include #include "base/types.hh" -#include "cpu/o3/sat_counter.hh" +#include "cpu/pred/bpred_unit.hh" +#include "cpu/pred/sat_counter.hh" /** * Implements a tournament branch predictor, hopefully identical to the one @@ -45,22 +48,13 @@ * is speculatively updated, the rest are updated upon branches committing * or misspeculating. */ -class TournamentBP +class TournamentBP : public BPredUnit { public: /** * Default branch predictor constructor. */ - TournamentBP(unsigned localPredictorSize, - unsigned localCtrBits, - unsigned localHistoryTableSize, - unsigned localHistoryBits, - unsigned globalPredictorSize, - unsigned globalHistoryBits, - unsigned globalCtrBits, - unsigned choicePredictorSize, - unsigned choiceCtrBits, - unsigned instShiftAmt); + TournamentBP(const Params *params); /** * Looks up the given address in the branch predictor and returns @@ -70,7 +64,7 @@ * @param bp_history Pointer that will be set to the BPHistory object. * @return Whether or not the branch is taken. */ - bool lookup(Addr &branch_addr, void * &bp_history); + virtual bool BPLookup(Addr &branch_addr, void * &bp_history); /** * Records that there was an unconditional branch, and modifies @@ -78,7 +72,7 @@ * global history stored in it. * @param bp_history Pointer that will be set to the BPHistory object. */ - void uncondBr(void * &bp_history); + virtual void BPUncond(void * &bp_history); /** * Updates the branch predictor with the actual result of a branch. @@ -87,14 +81,14 @@ * @param bp_history Pointer to the BPHistory object that was created * when the branch was predicted. */ - void update(Addr &branch_addr, bool taken, void *bp_history); + virtual void BPUpdate(Addr &branch_addr, bool taken, void *bp_history); /** * Restores the global branch history on a squash. * @param bp_history Pointer to the BPHistory object that has the * previous global branch history in it. */ - void squash(void *bp_history); + virtual void BPSquash(void *bp_history); /** Returns the global history. */ inline unsigned readGlobalHist() { return globalHistory; } @@ -218,4 +212,4 @@ unsigned threshold; }; -#endif // __CPU_O3_TOURNAMENT_PRED_HH__ +#endif // __CPU_PRED_TOURNAMENT_PRED_HH__ diff -r 140273325a4e -r 1d4d91ad559b src/cpu/pred/tournament.cc --- a/src/cpu/pred/tournament.cc Thu Jul 08 14:33:56 2010 +0100 +++ b/src/cpu/pred/tournament.cc Fri Jul 16 20:48:56 2010 +0100 @@ -1,5 +1,6 @@ /* * Copyright (c) 2004-2006 The Regents of The University of Michigan + * Copyright (c) 2010 The University of Edinburgh * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,31 +27,24 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Timothy M. Jones */ #include "base/intmath.hh" #include "cpu/pred/tournament.hh" -TournamentBP::TournamentBP(unsigned _localPredictorSize, - unsigned _localCtrBits, - unsigned _localHistoryTableSize, - unsigned _localHistoryBits, - unsigned _globalPredictorSize, - unsigned _globalCtrBits, - unsigned _globalHistoryBits, - unsigned _choicePredictorSize, - unsigned _choiceCtrBits, - unsigned _instShiftAmt) - : localPredictorSize(_localPredictorSize), - localCtrBits(_localCtrBits), - localHistoryTableSize(_localHistoryTableSize), - localHistoryBits(_localHistoryBits), - globalPredictorSize(_globalPredictorSize), - globalCtrBits(_globalCtrBits), - globalHistoryBits(_globalHistoryBits), - choicePredictorSize(_globalPredictorSize), - choiceCtrBits(_choiceCtrBits), - instShiftAmt(_instShiftAmt) +TournamentBP::TournamentBP(const Params *params) + : BPredUnit(params), + localPredictorSize(params->localPredictorSize), + localCtrBits(params->localCtrBits), + localHistoryTableSize(params->localHistoryTableSize), + localHistoryBits(params->localHistoryBits), + globalPredictorSize(params->globalPredictorSize), + globalCtrBits(params->globalCtrBits), + globalHistoryBits(params->globalHistoryBits), + choicePredictorSize(params->globalPredictorSize), + choiceCtrBits(params->choiceCtrBits), + instShiftAmt(params->instShiftAmt) { if (!isPowerOf2(localPredictorSize)) { fatal("Invalid local predictor size!\n"); @@ -147,7 +141,7 @@ } bool -TournamentBP::lookup(Addr &branch_addr, void * &bp_history) +TournamentBP::BPLookup(Addr &branch_addr, void * &bp_history) { bool local_prediction; unsigned local_history_idx; @@ -214,7 +208,7 @@ } void -TournamentBP::uncondBr(void * &bp_history) +TournamentBP::BPUncond(void * &bp_history) { // Create BPHistory and pass it back to be recorded. BPHistory *history = new BPHistory; @@ -227,7 +221,7 @@ } void -TournamentBP::update(Addr &branch_addr, bool taken, void *bp_history) +TournamentBP::BPUpdate(Addr &branch_addr, bool taken, void *bp_history) { unsigned local_history_idx; unsigned local_predictor_idx; @@ -279,7 +273,7 @@ } void -TournamentBP::squash(void *bp_history) +TournamentBP::BPSquash(void *bp_history) { BPHistory *history = static_cast(bp_history);