diff -r 87790d4eab5e -r 3299e0f1cdb8 src/arch/x86/debugfaults.hh --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/arch/x86/debugfaults.hh Fri Feb 11 08:05:54 2011 -0800 @@ -0,0 +1,121 @@ +/* + * Copyright (c) 2010 Advanced Micro Devices + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __ARCH_X86_DEBUGFAULTS_HH__ +#define __ARCH_X86_DEBUGFAULTS_HH__ + +#include "base/misc.hh" +#include "sim/faults.hh" + +#include + +namespace X86ISA +{ + class M5DebugFault : public FaultBase + { + protected: + std::string message; + + public: + M5DebugFault(std::string _message) : message(_message) + {} + }; + + class M5PanicFault : public M5DebugFault + { + public: + FaultName name() const { return "panic fault"; } + + M5PanicFault(std::string _message) : M5DebugFault(_message) + {} + + void invoke(ThreadContext *tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr) + { + panic(message); + } + }; + + class M5FatalFault : public M5DebugFault + { + public: + FaultName name() const { return "fatal fault"; } + + M5FatalFault(std::string _message) : M5DebugFault(_message) + {} + + void invoke(ThreadContext *tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr) + { + fatal(message); + } + }; + + class M5WarnFault : public M5DebugFault + { + public: + FaultName name() const { return "warn fault"; } + + M5WarnFault(std::string _message) : M5DebugFault(_message) + {} + + void invoke(ThreadContext *tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr) + { + warn(message); + } + }; + + class M5Warn_onceFault : public M5DebugFault + { + public: + FaultName name() const { return "warn_once fault"; } + + M5Warn_onceFault(std::string _message) : M5DebugFault(_message) + {} + + void invoke(ThreadContext *tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr) + { + warn_once(message); + } + }; +} // namespace X86ISA + +#endif // __ARCH_X86_DEBUGFAULTS_HH__ diff -r 87790d4eab5e -r 3299e0f1cdb8 src/arch/x86/isa/includes.isa --- a/src/arch/x86/isa/includes.isa Fri Feb 11 08:03:56 2011 -0800 +++ b/src/arch/x86/isa/includes.isa Fri Feb 11 08:05:54 2011 -0800 @@ -53,6 +53,7 @@ #include #include +#include "arch/x86/debugfaults.hh" #include "arch/x86/emulenv.hh" #include "arch/x86/insts/macroop.hh" #include "arch/x86/insts/microfpop.hh" diff -r 87790d4eab5e -r 3299e0f1cdb8 src/arch/x86/isa/microops/debug.isa --- a/src/arch/x86/isa/microops/debug.isa Fri Feb 11 08:03:56 2011 -0800 +++ b/src/arch/x86/isa/microops/debug.isa Fri Feb 11 08:05:54 2011 -0800 @@ -42,19 +42,33 @@ ////////////////////////////////////////////////////////////////////////// output header {{ + template class MicroDebugBase : public X86ISA::X86MicroopBase { protected: + typedef FType FaultType; std::string message; uint8_t cc; public: - MicroDebugBase(ExtMachInst _machInst, const char * mnem, + MicroDebugBase(ExtMachInst machInst, const char * mnem, const char * instMnem, uint64_t setFlags, - std::string _message, uint8_t _cc); + std::string _message, uint8_t _cc) : + X86MicroopBase(machInst, mnem, instMnem, setFlags, No_OpClass), + message(_message), cc(_cc) + { + } - std::string generateDisassembly(Addr pc, - const SymbolTable *symtab) const; + std::string + generateDisassembly(Addr pc, const SymbolTable *symtab) const + { + std::stringstream response; + + printMnemonic(response, instMnem, mnemonic); + response << "\"" << message << "\""; + + return response.str(); + } }; }}; @@ -70,29 +84,20 @@ }}; def template MicroDebugExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault + %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const { %(op_decl)s %(op_rd)s if (%(cond_test)s) { - %(func)s("%s\n", message); + return new FaultType(message); + } else { + return NoFault; } - return NoFault; } }}; -output decoder {{ - inline MicroDebugBase::MicroDebugBase( - ExtMachInst machInst, const char * mnem, const char * instMnem, - uint64_t setFlags, std::string _message, uint8_t _cc) : - X86MicroopBase(machInst, mnem, instMnem, - setFlags, No_OpClass), - message(_message), cc(_cc) - { - } -}}; - def template MicroDebugConstructor {{ inline %(class_name)s::%(class_name)s( ExtMachInst machInst, const char * instMnem, uint64_t setFlags, @@ -104,19 +109,6 @@ } }}; -output decoder {{ - std::string MicroDebugBase::generateDisassembly(Addr pc, - const SymbolTable *symtab) const - { - std::stringstream response; - - printMnemonic(response, instMnem, mnemonic); - response << "\"" << message << "\""; - - return response.str(); - } -}}; - let {{ class MicroDebug(X86Microop): def __init__(self, message, flags=None): @@ -146,7 +138,7 @@ global exec_output, header_output, decoder_output iop = InstObjParams(func, "Micro%sFlags" % func.capitalize(), - "MicroDebugBase", + "MicroDebugBase" % func.capitalize(), {"code": "", "func": func, "cond_test": "checkCondition(ccFlagBits, cc)"}) @@ -155,7 +147,7 @@ decoder_output += MicroDebugConstructor.subst(iop) iop = InstObjParams(func, "Micro%s" % func.capitalize(), - "MicroDebugBase", + "MicroDebugBase" % func.capitalize(), {"code": "", "func": func, "cond_test": "true"})