diff -r 9361357215c1 -r 13d9cf3687a5 src/cpu/o3/commit_impl.hh --- a/src/cpu/o3/commit_impl.hh Fri Jul 15 11:41:09 2011 -0500 +++ b/src/cpu/o3/commit_impl.hh Fri Jul 15 11:41:09 2011 -0500 @@ -1189,8 +1189,8 @@ } } #endif - DPRINTF(Commit, "Committing instruction with [sn:%lli]\n", - head_inst->seqNum); + DPRINTF(Commit, "Committing instruction with [sn:%lli] PC %s\n", + head_inst->seqNum, head_inst->pcState()); if (head_inst->traceData) { head_inst->traceData->setFetchSeq(head_inst->seqNum); head_inst->traceData->setCPSeq(thread[tid]->numInst); diff -r 9361357215c1 -r 13d9cf3687a5 src/cpu/o3/mem_dep_unit.hh --- a/src/cpu/o3/mem_dep_unit.hh Fri Jul 15 11:41:09 2011 -0500 +++ b/src/cpu/o3/mem_dep_unit.hh Fri Jul 15 11:41:09 2011 -0500 @@ -169,7 +169,7 @@ ++memdep_count; DPRINTF(MemDepUnit, "Memory dependency entry created. " - "memdep_count=%i\n", memdep_count); + "memdep_count=%i %s\n", memdep_count, inst->pcState()); #endif } @@ -183,7 +183,7 @@ --memdep_count; DPRINTF(MemDepUnit, "Memory dependency entry deleted. " - "memdep_count=%i\n", memdep_count); + "memdep_count=%i %s\n", memdep_count, inst->pcState()); #endif } diff -r 9361357215c1 -r 13d9cf3687a5 src/cpu/o3/mem_dep_unit_impl.hh --- a/src/cpu/o3/mem_dep_unit_impl.hh Fri Jul 15 11:41:09 2011 -0500 +++ b/src/cpu/o3/mem_dep_unit_impl.hh Fri Jul 15 11:41:09 2011 -0500 @@ -285,7 +285,8 @@ loadBarrierSN = barr_sn; storeBarrier = true; storeBarrierSN = barr_sn; - DPRINTF(MemDepUnit, "Inserted a memory barrier\n"); + DPRINTF(MemDepUnit, "Inserted a memory barrier %s SN:%lli\n", + barr_inst->pcState(),barr_sn); } else if (barr_inst->isWriteBarrier()) { storeBarrier = true; storeBarrierSN = barr_sn; @@ -405,7 +406,8 @@ completed(inst); InstSeqNum barr_sn = inst->seqNum; - + DPRINTF(MemDepUnit, "barrier completed: %s SN:%lli\n",inst->pcState(), + inst->seqNum); if (inst->isMemBarrier()) { assert(loadBarrier && storeBarrier); if (loadBarrierSN == barr_sn) @@ -480,6 +482,12 @@ DPRINTF(MemDepUnit, "Squashing inst [sn:%lli]\n", (*squash_it)->seqNum); + if((*squash_it)->seqNum == loadBarrierSN) + loadBarrier = false; + + if((*squash_it)->seqNum == storeBarrierSN) + storeBarrier = false; + hash_it = memDepHash.find((*squash_it)->seqNum); assert(hash_it != memDepHash.end()); @@ -509,7 +517,7 @@ " load: %#x, store: %#x\n", violating_load->instAddr(), store_inst->instAddr()); // Tell the memory dependence unit of the violation. - depPred.violation(violating_load->instAddr(), store_inst->instAddr()); + depPred.violation(store_inst->instAddr(), violating_load->instAddr()); } template