diff -r 1459a12519a6 -r 31e14fedb922 src/arch/alpha/process.hh
--- a/src/arch/alpha/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/alpha/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -36,10 +36,14 @@
 
 class AlphaLiveProcess : public LiveProcess
 {
+  private:
+    void setupASNReg();
+
   protected:
     AlphaLiveProcess(LiveProcessParams *params, ObjectFile *objFile);
 
-    void startup();
+    void loadState(Checkpoint *cp);
+    void initState();
 
     void argsInit(int intSize, int pageSize);
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/alpha/process.cc
--- a/src/arch/alpha/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/alpha/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -173,19 +173,35 @@
 }
 
 void
-AlphaLiveProcess::startup()
+AlphaLiveProcess::setupASNReg()
 {
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     tc->setMiscRegNoEffect(IPR_DTB_ASN, M5_pid << 57);
+}
 
-    if (checkpointRestored) {
-        return;
-    }
 
-    Process::startup();
+void
+AlphaLiveProcess::loadState(Checkpoint *cp)
+{
+    LiveProcess::loadState(cp);
+    // need to set up ASN after unserialization since M5_pid value may
+    // come from checkpoint
+    setupASNReg();
+}
+
+
+void
+AlphaLiveProcess::initState()
+{
+    // need to set up ASN before further initialization since init
+    // will involve writing to virtual memory addresses
+    setupASNReg();
+
+    LiveProcess::initState();
 
     argsInit(MachineBytes, VMPageSize);
 
+    ThreadContext *tc = system->getThreadContext(contextIds[0]);
     tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
     //Operate in user mode
     tc->setMiscRegNoEffect(IPR_ICM, 0x18);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/arm/process.cc
--- a/src/arch/arm/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/arm/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -76,6 +76,7 @@
 void
 ArmLiveProcess::startup()
 {
+    LiveProcess::startup();
     argsInit(MachineBytes, VMPageSize);
 }
 
@@ -114,9 +115,6 @@
     //We want 16 byte alignment
     uint64_t align = 16;
 
-    // Overloaded argsInit so that we can fine-tune for ARM architecture
-    Process::startup();
-
     // load object file into target memory
     objFile->loadSections(initVirtMem);
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/mips/process.hh
--- a/src/arch/mips/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/mips/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -45,7 +45,7 @@
   protected:
     MipsLiveProcess(LiveProcessParams * params, ObjectFile *objFile);
 
-    void startup();
+    void initState();
 
     template<class IntType>
     void argsInit(int pageSize);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/mips/process.cc
--- a/src/arch/mips/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/mips/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -67,9 +67,9 @@
 }
 
 void
-MipsLiveProcess::startup()
+MipsLiveProcess::initState()
 {
-    Process::startup();
+    LiveProcess::initState();
 
     argsInit<uint32_t>(VMPageSize);
 }
@@ -79,7 +79,6 @@
 MipsLiveProcess::argsInit(int pageSize)
 {
     int intSize = sizeof(IntType);
-    Process::startup();
 
     // load object file into target memory
     objFile->loadSections(initVirtMem);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/power/linux/process.hh
--- a/src/arch/power/linux/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/power/linux/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -44,7 +44,7 @@
 
     virtual SyscallDesc* getDesc(int callnum);
 
-    void startup();
+    void initState();
 
     PowerISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
     void setSyscallArg(ThreadContext *tc, int i, PowerISA::IntReg val);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/power/linux/process.cc
--- a/src/arch/power/linux/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/power/linux/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -432,9 +432,9 @@
 }
 
 void
-PowerLinuxProcess::startup()
+PowerLinuxProcess::initState()
 {
-    PowerLiveProcess::startup();
+    PowerLiveProcess::initState();
 }
 
 PowerISA::IntReg
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/power/process.hh
--- a/src/arch/power/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/power/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -46,7 +46,7 @@
   protected:
     PowerLiveProcess(LiveProcessParams * params, ObjectFile *objFile);
 
-    void startup();
+    void initState();
 
   public:
     void argsInit(int intSize, int pageSize);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/power/process.cc
--- a/src/arch/power/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/power/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -63,8 +63,10 @@
 }
 
 void
-PowerLiveProcess::startup()
+PowerLiveProcess::initState()
 {
+    Process::initState();
+
     argsInit(MachineBytes, VMPageSize);
 }
 
@@ -83,9 +85,6 @@
     //We want 16 byte alignment
     uint64_t align = 16;
 
-    // Overloaded argsInit so that we can fine-tune for POWER architecture
-    Process::startup();
-
     // load object file into target memory
     objFile->loadSections(initVirtMem);
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/sparc/process.hh
--- a/src/arch/sparc/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/sparc/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -52,7 +52,7 @@
     SparcLiveProcess(LiveProcessParams * params,
             ObjectFile *objFile, Addr _StackBias);
 
-    void startup();
+    void initState();
 
     template<class IntType>
     void argsInit(int pageSize);
@@ -87,7 +87,7 @@
         mmap_start = mmap_end = 0x70000000;
     }
 
-    void startup();
+    void initState();
 
   public:
 
@@ -115,7 +115,7 @@
         mmap_start = mmap_end = 0xfffff80000000000ULL;
     }
 
-    void startup();
+    void initState();
 
   public:
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/sparc/process.cc
--- a/src/arch/sparc/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/sparc/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -111,9 +111,9 @@
 }
 
 void
-SparcLiveProcess::startup()
+SparcLiveProcess::initState()
 {
-    Process::startup();
+    LiveProcess::initState();
 
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     //From the SPARC ABI
@@ -157,12 +157,9 @@
 }
 
 void
-Sparc32LiveProcess::startup()
+Sparc32LiveProcess::initState()
 {
-    if (checkpointRestored)
-        return;
-
-    SparcLiveProcess::startup();
+    SparcLiveProcess::initState();
 
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     //The process runs in user mode with 32 bit addresses
@@ -172,12 +169,9 @@
 }
 
 void
-Sparc64LiveProcess::startup()
+Sparc64LiveProcess::initState()
 {
-    if (checkpointRestored)
-        return;
-
-    SparcLiveProcess::startup();
+    SparcLiveProcess::initState();
 
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     //The process runs in user mode
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/linux/system.hh
--- a/src/arch/x86/linux/system.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/linux/system.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -58,7 +58,7 @@
     LinuxX86System(Params *p);
     ~LinuxX86System();
 
-    void startup();
+    void initState();
 };
 
 #endif
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/linux/system.cc
--- a/src/arch/x86/linux/system.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/linux/system.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -59,9 +59,9 @@
 }
 
 void
-LinuxX86System::startup()
+LinuxX86System::initState()
 {
-    X86System::startup();
+    X86System::initState();
 
     // The location of the real mode data structure.
     const Addr realModeData = 0x90200;
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/process.hh
--- a/src/arch/x86/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -99,7 +99,7 @@
 
       public:
         void argsInit(int intSize, int pageSize);
-        void startup();
+        void initState();
 
         X86ISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
         void setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val);
@@ -123,7 +123,7 @@
 
       public:
         void argsInit(int intSize, int pageSize);
-        void startup();
+        void initState();
 
         void syscall(int64_t callnum, ThreadContext *tc);
         X86ISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/process.cc
--- a/src/arch/x86/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -157,12 +157,9 @@
 }
 
 void
-X86_64LiveProcess::startup()
+X86_64LiveProcess::initState()
 {
-    LiveProcess::startup();
-
-    if (checkpointRestored)
-        return;
+    X86LiveProcess::initState();
 
     argsInit(sizeof(uint64_t), VMPageSize);
 
@@ -255,12 +252,9 @@
 }
 
 void
-I386LiveProcess::startup()
+I386LiveProcess::initState()
 {
-    LiveProcess::startup();
-
-    if (checkpointRestored)
-        return;
+    X86LiveProcess::initState();
 
     argsInit(sizeof(uint32_t), VMPageSize);
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/system.hh
--- a/src/arch/x86/system.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/system.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -77,7 +77,7 @@
     void serialize(std::ostream &os);
     void unserialize(Checkpoint *cp, const std::string &section);
 
-    void startup();
+    void initState();
 
   protected:
 
diff -r 1459a12519a6 -r 31e14fedb922 src/arch/x86/system.cc
--- a/src/arch/x86/system.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/arch/x86/system.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -109,9 +109,10 @@
 }
 
 void
-X86System::startup()
+X86System::initState()
 {
-    System::startup();
+    System::initState();
+
     ThreadContext *tc = threadContexts[0];
     // This is the boot strap processor (BSP). Initialize it to look like
     // the boot loader has just turned control over to the 64 bit OS. We
diff -r 1459a12519a6 -r 31e14fedb922 src/python/m5/simulate.py
--- a/src/python/m5/simulate.py	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/python/m5/simulate.py	Thu Jul 29 21:41:20 2010 -0700
@@ -87,8 +87,12 @@
 
     # Restore checkpoint (if any)
     if ckpt_dir:
-        internal.core.unserializeAll(ckpt_dir)
+        ckpt = internal.core.getCheckpoint(ckpt_dir)
+        internal.core.unserializeGlobals(ckpt);
+        for obj in root.iterChildren(): obj.loadState(ckpt)
         need_resume.append(root)
+    else:
+        for obj in root.iterChildren(): obj.initState()
 
     # Reset to put the stats in a consistent state.
     stats.reset()
diff -r 1459a12519a6 -r 31e14fedb922 src/python/swig/core.i
--- a/src/python/swig/core.i	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/python/swig/core.i	Thu Jul 29 21:41:20 2010 -0700
@@ -75,8 +75,11 @@
 %immutable curTick;
 Tick curTick;
 
+class Checkpoint;
+
 void serializeAll(const std::string &cpt_dir);
-void unserializeAll(const std::string &cpt_dir);
+Checkpoint *getCheckpoint(const std::string &cpt_dir);
+void unserializeGlobals(Checkpoint *cp);
 
 bool want_warn, warn_verbose;
 bool want_info, info_verbose;
diff -r 1459a12519a6 -r 31e14fedb922 src/python/swig/pyobject.hh
--- a/src/python/swig/pyobject.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/python/swig/pyobject.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -52,8 +52,14 @@
     Serializable::serializeAll(cpt_dir);
 }
 
+inline Checkpoint *
+getCheckpoint(const std::string &cpt_dir)
+{
+    return new Checkpoint(cpt_dir);
+}
+
 inline void
-unserializeAll(const std::string &cpt_dir)
+unserializeGlobals(Checkpoint *cp)
 {
-    Serializable::unserializeAll(cpt_dir);
+    Serializable::unserializeGlobals(cp);
 }
diff -r 1459a12519a6 -r 31e14fedb922 src/python/swig/sim_object.i
--- a/src/python/swig/sim_object.i	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/python/swig/sim_object.i	Thu Jul 29 21:41:20 2010 -0700
@@ -51,6 +51,8 @@
     };
 
     void init();
+    void loadState(Checkpoint *cp);
+    void initState();
     void regStats();
     void regFormulas();
     void resetStats();
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/process.hh
--- a/src/sim/process.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/process.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -130,8 +130,7 @@
     // constructor
     Process(ProcessParams * params);
 
-    // post initialization startup
-    virtual void startup();
+    virtual void initState();
 
   protected:
     /// Memory object for initialization (image loading)
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/process.cc
--- a/src/sim/process.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/process.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -233,7 +233,7 @@
 }
 
 void
-Process::startup()
+Process::initState()
 {
     if (contextIds.empty())
         fatal("Process %s is not associated with any HW contexts!\n", name());
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/serialize.hh
--- a/src/sim/serialize.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/serialize.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -141,7 +141,6 @@
     static int ckptMaxCount;
     static int ckptPrevCount;
     static void serializeAll(const std::string &cpt_dir);
-    static void unserializeAll(const std::string &cpt_dir);
     static void unserializeGlobals(Checkpoint *cp);
 };
 
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/serialize.cc
--- a/src/sim/serialize.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/serialize.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -452,17 +452,6 @@
 }
 
 void
-Serializable::unserializeAll(const string &cpt_dir)
-{
-    string dir = Checkpoint::setDir(cpt_dir);
-
-    DPRINTFR(Config, "Loading checkpoint dir '%s'\n", dir);
-    Checkpoint *cp = new Checkpoint(dir);
-    unserializeGlobals(cp);
-    SimObject::unserializeAll(cp);
-}
-
-void
 Serializable::unserializeGlobals(Checkpoint *cp)
 {
     globals.unserialize(cp);
@@ -561,9 +550,9 @@
 
 
 Checkpoint::Checkpoint(const string &cpt_dir)
-    : db(new IniFile), cptDir(cpt_dir)
+    : db(new IniFile), cptDir(setDir(cpt_dir))
 {
-    string filename = cpt_dir + "/" + Checkpoint::baseFilename;
+    string filename = cptDir + "/" + Checkpoint::baseFilename;
     if (!db->load(filename)) {
         fatal("Can't load checkpoint file '%s'\n", filename);
     }
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/sim_object.hh
--- a/src/sim/sim_object.hh	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/sim_object.hh	Thu Jul 29 21:41:20 2010 -0700
@@ -95,6 +95,9 @@
     // Gets invoked after construction, before unserialize.
     virtual void init();
 
+    virtual void loadState(Checkpoint *cp);
+    virtual void initState();
+
     // register statistics for this object
     virtual void regStats();
     virtual void regFormulas();
diff -r 1459a12519a6 -r 31e14fedb922 src/sim/sim_object.cc
--- a/src/sim/sim_object.cc	Thu Jul 29 21:41:17 2010 -0700
+++ b/src/sim/sim_object.cc	Thu Jul 29 21:41:20 2010 -0700
@@ -74,6 +74,18 @@
 }
 
 void
+SimObject::loadState(Checkpoint *cp)
+{
+    if (cp->sectionExists(name()))
+        unserialize(cp, name());
+}
+
+void
+SimObject::initState()
+{
+}
+
+void
 SimObject::startup()
 {
 }