diff -r bfc59fbde824 src/arch/mips/SConscript --- a/src/arch/mips/SConscript Mon Aug 29 06:34:40 2011 -0500 +++ b/src/arch/mips/SConscript Thu Sep 01 10:48:15 2011 +0800 @@ -39,6 +39,7 @@ Source('pagetable.cc') Source('utility.cc') Source('dsp.cc') + Source('remote_gdb.cc') SimObject('MipsTLB.py') DebugFlag('MipsPRA') diff -r bfc59fbde824 src/arch/mips/remote_gdb.hh --- a/src/arch/mips/remote_gdb.hh Mon Aug 29 06:34:40 2011 -0500 +++ b/src/arch/mips/remote_gdb.hh Thu Sep 01 10:48:15 2011 +0800 @@ -33,32 +33,39 @@ #include "base/remote_gdb.hh" +class System; +class ThreadContext; +class PhysicalMemory; + namespace MipsISA { + + const int NUMREGS = 36; + const int NUM_INTREGS = 16; + const int NUM_FLOATREGS = 16; + const int START_R0 = 0; + const int START_F0 = 19; + class RemoteGDB : public BaseRemoteGDB { + protected: + Addr notTakenBkpt; + Addr takenBkpt; + public: //These needs to be written to suit MIPS + RemoteGDB(System *_system, ThreadContext *tc); - RemoteGDB(System *system, ThreadContext *context) - : BaseRemoteGDB(system, context, 1) - {} + protected: + bool acc(Addr addr, size_t len); + bool write(Addr addr, size_t size, const char *data); - bool acc(Addr, size_t) - { panic("acc not implemented for MIPS!"); } + void getregs(); + void setregs(); - void getregs() - { panic("getregs not implemented for MIPS!"); } - - void setregs() - { panic("setregs not implemented for MIPS!"); } - - void clearSingleStep() - { panic("clearSingleStep not implemented for MIPS!"); } - - void setSingleStep() - { panic("setSingleStep not implemented for MIPS!"); } + void clearSingleStep(); + void setSingleStep(); }; } -#endif /* __ARCH_ALPHA_REMOTE_GDB_H__ */ +#endif /* __ARCH_MIPS_REMOTE_GDB_H__ */ diff -r bfc59fbde824 src/arch/mips/remote_gdb.cc --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/arch/mips/remote_gdb.cc Thu Sep 01 10:48:15 2011 +0800 @@ -0,0 +1,316 @@ +/* + * Copyright (c) 2010 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Copyright (c) 2002-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + * William Wang + * Deyuan Guo + */ + +/* + * Copyright (c) 1990, 1993 The Regents of the University of California + * All rights reserved + * + * This software was developed by the Computer Systems Engineering group + * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and + * contributed to Berkeley. + * + * All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Lawrence Berkeley Laboratories. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 + */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ + * + * Taken from NetBSD + * + * "Stub" to allow remote cpu to debug over a serial line using gdb. + */ + +#include +#include + +#include + +#include "config/full_system.hh" +#if FULL_SYSTEM +#include "arch/mips/vtophys.hh" +#endif + +#include "arch/mips/pagetable.hh" +#include "arch/mips/registers.hh" +#include "arch/mips/remote_gdb.hh" +#include "arch/mips/utility.hh" +#include "arch/mips/vtophys.hh" +#include "base/intmath.hh" +#include "base/remote_gdb.hh" +#include "base/socket.hh" +#include "base/trace.hh" +#include "base/bitfield.hh" +#include "cpu/static_inst.hh" +#include "cpu/thread_context.hh" +#include "cpu/thread_state.hh" +#include "debug/GDBAcc.hh" +#include "debug/GDBMisc.hh" +#include "mem/page_table.hh" +#include "mem/physical.hh" +#include "mem/port.hh" +#include "sim/system.hh" + +using namespace std; +using namespace MipsISA; + +RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) + : BaseRemoteGDB(_system, tc, NUMREGS) +{ +} + +/* + * Determine if the mapping at va..(va+len) is valid. + */ +bool +RemoteGDB::acc(Addr va, size_t len) +{ +#if FULL_SYSTEM + panic("acc not implemented for MIPS FS!"); +#endif + TlbEntry entry; + //Check to make sure the first byte is mapped into the processes address + //space. + if (context->getProcessPtr()->pTable->lookup(va, entry)) + return true; + return false; +} + +/* + * Translate the kernel debugger register format into the GDB register + * format. + */ +void +RemoteGDB::getregs() +{ + DPRINTF(GDBAcc, "getregs in remotegdb \n"); + memset(gdbregs.regs, 0, gdbregs.bytes()); + + // MIPS registers are 32 bits wide, gdb registers are 64 bits wide + // two MIPS registers are packed into one gdb register (little endian) + + // INTREG: R0~R31 + for (int i = 0; i < NUM_INTREGS; i++) { + gdbregs.regs[START_R0 + i] = context->readIntReg(i*2+1) << 32 | + context->readIntReg(i*2); + } + // SR, LO, HI, BADVADDR, CAUSE, PC + gdbregs.regs[START_R0 + NUM_INTREGS + 0] = context->readIntReg(INTREG_LO) << 32 | + context->readMiscRegNoEffect(MISCREG_STATUS); + gdbregs.regs[START_R0 + NUM_INTREGS + 1] = context->readMiscRegNoEffect(MISCREG_BADVADDR) << 32 | + context->readIntReg(INTREG_HI); + gdbregs.regs[START_R0 + NUM_INTREGS + 2] = context->pcState().pc() << 32 | + context->readMiscRegNoEffect(MISCREG_CAUSE); + // FLOATREG: F0~F31 + for (int i = 0; i < NUM_FLOATREGS; i++) { + gdbregs.regs[START_F0 + i] = + static_cast(context->readFloatRegBits(i*2+1)) << 32 | + context->readFloatRegBits(i*2); + } + // FCR, FIR + gdbregs.regs[START_F0 + NUM_FLOATREGS + 0] = + static_cast(context->readFloatRegBits(FLOATREG_FIR)) << 32 | + context->readFloatRegBits(FLOATREG_FCCR); +} + +/* + * Translate the GDB register format into the kernel debugger register + * format. + */ +void +RemoteGDB::setregs() +{ + DPRINTF(GDBAcc, "setregs in remotegdb \n"); + + // MIPS registers are 32 bits wide, gdb registers are 64 bits wide + // two MIPS registers are packed into one gdb register (little endian) + + // INTREG: R0~R31 + for (int i = 0; i < NUM_INTREGS; i++) { + if (i) context->setIntReg(i*2, bits(gdbregs.regs[START_R0 + i], 31, 0)); + context->setIntReg(i*2+1, bits(gdbregs.regs[START_R0 + i], 63, 32)); + } + // SR, LO, HI, BADVADDR, CAUSE, PC + context->setMiscRegNoEffect(MISCREG_STATUS, + bits(gdbregs.regs[START_R0 + NUM_INTREGS + 0], 31, 0)); + context->setIntReg(INTREG_LO, + bits(gdbregs.regs[START_R0 + NUM_INTREGS + 0], 63, 32)); + context->setIntReg(INTREG_HI, + bits(gdbregs.regs[START_R0 + NUM_INTREGS + 1], 31, 0)); + context->setMiscRegNoEffect(MISCREG_BADVADDR, + bits(gdbregs.regs[START_R0 + NUM_INTREGS + 1], 63, 32)); + context->setMiscRegNoEffect(MISCREG_CAUSE, + bits(gdbregs.regs[START_R0 + NUM_INTREGS + 2], 31, 0)); + context->pcState(bits(gdbregs.regs[START_R0 + NUM_INTREGS + 2], 63, 32)); + // FLOATREG: F0~F31 + for (int i = 0; i < NUM_FLOATREGS; i++) { + context->setFloatRegBits(i*2, bits(gdbregs.regs[START_F0 + i], 31, 0)); + context->setFloatRegBits(i*2+1, bits(gdbregs.regs[START_F0 + i], 63, 32)); + } + // FCR, FIR + context->setFloatRegBits(FLOATREG_FCCR, + bits(gdbregs.regs[START_F0 + NUM_FLOATREGS + 0], 31, 0)); + context->setFloatRegBits(FLOATREG_FIR, + bits(gdbregs.regs[START_F0 + NUM_FLOATREGS + 0], 63, 32)); +} + +void +RemoteGDB::clearSingleStep() +{ + DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", + takenBkpt, notTakenBkpt); + + if (takenBkpt != 0) + clearTempBreakpoint(takenBkpt); + + if (notTakenBkpt != 0) + clearTempBreakpoint(notTakenBkpt); +} + +void +RemoteGDB::setSingleStep() +{ + PCState pc = context->pcState(); + PCState bpc; + bool set_bt = false; + + // User was stopped at pc, e.g. the instruction at pc was not + // executed. + MachInst inst = read(pc.pc()); + StaticInstPtr si(inst, pc.pc()); + if (si->hasBranchTarget(pc, context, bpc)) { + // Don't bother setting a breakpoint on the taken branch if it + // is the same as the next pc + // MIPS has branch delay slot + if (bpc.npc() != pc.nnpc()) + set_bt = true; + } + + DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", + takenBkpt, notTakenBkpt); + + notTakenBkpt = pc.nnpc(); + setTempBreakpoint(notTakenBkpt); + + if (set_bt) { + takenBkpt = bpc.npc(); + setTempBreakpoint(takenBkpt); + } +} + +// Write bytes to kernel address space for debugger. +bool +RemoteGDB::write(Addr vaddr, size_t size, const char *data) +{ + return BaseRemoteGDB::write(vaddr, size, data); +} +